goto *lab[register_PC]; L0000: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x01; register_A = flag_C = acc_a0 = 0x0f01; ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0008; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ L0008: ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = (register_P << 4) + 0x0] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDIdir_A_A (c0) */ register_I = ram[(register_P << 4) + 0x00] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAirg_B_BB (e6) */ ram[register_I] = register_B; /* store acc */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0008; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = (register_P << 4) + 0x0] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (95) */ ccpu_ICount += 1; register_PC = 0x0011 /* Force consistency */; /* opOUTsnd_A (95) */ reset_coin_counter(register_A&1); ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0904; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0904; ccpu_ICount -= 2; goto *lab[register_PC];}; L0026: ccpu_ICount += 1; /* opLDAimm_A_AA (09) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0900; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1c; register_A = flag_C = acc_a0 = 0x091c; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x002a /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xd3; register_A = flag_C = acc_a0 = 0x02d3; ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x83] = 0x2d3; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x22] = 0x2d3; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x23] = 0x2d3; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = 0x2c] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x2d] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x62] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x60] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x6a] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = 0x6c] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x69] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x61] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opINP_A_AA (17) */ register_PC = 0x0041 /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0x7); ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0058; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0058; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0000; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; ccpu_ICount += 2; /* opJPP8_A_B (50) */ register_PC = 0x1000; /* rom offset */ {register_PC = 0x1000; ccpu_ICount -= 2; goto *lab[register_PC];}; L004a: ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x001f))) & 0xFFF; /* add values */ ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0056; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0056; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0058; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0058; ccpu_ICount -= 2; goto *lab[register_PC];}; L0056: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0058: ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (03) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0x0300; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0060; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x12) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L0065: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0065; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0065; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (2b) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000b))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 0; /* opLLT_A_AA (e4) */ {CINEBYTE temp_byte = 0; for (;;) { if ( (((register_A >> 8) & 0x0A) && (((register_A >> 8) & 0x0A) ^ 0x0A)) || (((register_B >> 8) & 0x0A) && (((register_B >> 8) & 0x0A) ^ 0x0A)) ) break; register_A <<= 1; register_B <<= 1; if (!(++temp_byte)) break /* This may not be correct */; } vgShiftLength = temp_byte & 0xfff; register_A &= 0x0FFF; register_B &= 0x0FFF; } ccpu_ICount += 0; /* opWAI_A_A (e5) */ /* wait for a tick on the watchdog */ #ifndef DUALCPU CinemaClearScreen(); bNewFrame = 1; bailOut = TRUE; #endif register_PC = 0x006f; continue; /* NOT REALLY A JUMP - ACTUALLY FOR GETTING BACK TO POLLING LOOP - NEEDS WORK */ L006f: ccpu_ICount += 0; /* opWAI_A_A (e5) */ /* wait for a tick on the watchdog */ #ifndef DUALCPU CinemaClearScreen(); bNewFrame = 1; bailOut = TRUE; #endif register_PC = 0x0070; continue; /* NOT REALLY A JUMP - ACTUALLY FOR GETTING BACK TO POLLING LOOP - NEEDS WORK */ L0070: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opAWDirg_A_AA (f7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x00be; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x00be; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1e; register_A = flag_C = acc_a0 = 0x001e; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x007b /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x007d /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x007f /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x0081 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0083 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0085 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1a; register_A = flag_C = acc_a0 = 0x001a; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x0089 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x008b /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x008d /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x008f /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0091 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0093 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x18; register_A = flag_C = acc_a0 = 0x0018; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x0097 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x0099 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x009b /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x009d /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x009f /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x00a1 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x16; register_A = flag_C = acc_a0 = 0x0016; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x00a5 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x00a7 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x00a9 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x00ab /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x00ad /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x00af /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x14; register_A = flag_C = acc_a0 = 0x0014; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x00b3 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x00b5 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x00b7 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x00b9 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x00bb /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x00bd /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); L00be: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x17; register_A = flag_C = acc_a0 = 0x0017; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x37]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x00df; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x00df; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x15; register_A = flag_C = acc_a0 = 0x0115; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x33]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x00e2; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x00e2; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x30]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x00e2; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x69]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x00df; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x00df; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (2f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000f))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x72] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x73]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L00df: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x30] = 0x000; /* store acc to RAM */ L00e2: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x17; register_A = flag_C = acc_a0 = 0x0017; ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x47]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0103; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0103; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x15; register_A = flag_C = acc_a0 = 0x0115; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x43]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0106; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0106; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x40]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0106; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x69]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0103; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0103; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (2f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000f))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x72] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x73]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0103: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x40] = 0x000; /* store acc to RAM */ L0106: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x17; register_A = flag_C = acc_a0 = 0x0017; ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x57]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x0127; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0127; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x15; register_A = flag_C = acc_a0 = 0x0115; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x53]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x012a; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x012a; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x50]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x012a; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x69]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x0127; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0127; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (2f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000f))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x72] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x73]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0127: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x50] = 0x000; /* store acc to RAM */ L012a: ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x73]; /* set I register */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x013e; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x013e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x14; register_A = flag_C = acc_a0 = 0x0014; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x0133 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x0135 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x0137 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x0139 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x013b /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x013d /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); L013e: ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0140; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = 0x07; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xa0; register_A = flag_C = acc_a0 = 0x00a0; ccpu_ICount += 1; /* opLDPimm_A_A (8c) */ register_P = 0xc; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0xc1] = 0x0a0; /* store acc to RAM */ L0148: ccpu_ICount += 3; /* opLDAdir_A_AA (a1) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x01]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = (register_P << 4) + 0x2] = register_A; /* store acc to RAM */ L014b: ccpu_ICount += 1; /* opLDAimm_A_AA (04) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0400; ccpu_ICount += 1; /* opADDimm_A_AA (28) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0008))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDIdir_A_A (c1) */ register_I = ram[(register_P << 4) + 0x01] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (03) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0x0300; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x015b; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0164; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0164; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0164: ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = (register_P << 4) + 0x8] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x70] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (24) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0004))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x73]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x018b; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x018b; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSUBirg_B_AA (e8) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 1; /* opLDPimm_A_A (8c) */ register_P = 0xc; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0xc5]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x74] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0181; L0181: ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0181; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (8c) */ register_P = 0xc; /* set page register */ ccpu_ICount += 3; /* opADDdir_A_AA (65) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0xc5]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = register_A & 0x01 ? 0x0f: 0x07; L018b: ccpu_ICount += 1; /* opLDPimm_A_A (8c) */ register_P = 0xc; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0xc5]; /* set I register */ ccpu_ICount += 3; /* opLDIdir_A_A (c1) */ register_I = ram[0xc1] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 1; /* opADDimm_A_AA (28) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0008))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDIdir_A_A (c2) */ register_I = ram[0xc2] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0xc6] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x01a1; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x01a1; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L01a1: ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = (register_P << 4) + 0x9] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opADDdir_A_AA (60) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x70]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (24) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0004))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x73]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x01c6; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x01c6; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSUBirg_B_AA (e8) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 1; /* opLDPimm_A_A (8c) */ register_P = 0xc; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0xc6]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x74] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x01bf; L01bf: ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x01bf; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (8c) */ register_P = 0xc; /* set page register */ ccpu_ICount += 3; /* opADDdir_A_AA (66) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0xc6]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L01c6: ccpu_ICount += 1; /* opLDPimm_A_A (8c) */ register_P = 0xc; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0xc6]; /* set I register */ ccpu_ICount += 3; /* opLDIdir_A_A (c2) */ register_I = ram[0xc2] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (09) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0900; ccpu_ICount += 3; /* opLDIdir_A_A (c1) */ register_I = ram[0xc1] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x020f; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x020f; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (07) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0700; ccpu_ICount += 3; /* opLDIdir_A_A (c2) */ register_I = ram[0xc2] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x020f; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a8) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0xc8]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (34) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x4) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x01df; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x01df; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0xc9]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (35) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x5) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x020f; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x020f; ccpu_ICount -= 2; goto *lab[register_PC];}; L01df: ccpu_ICount += 3; /* opLDIdir_A_A (c2) */ register_I = ram[(register_P << 4) + 0x02] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 3; /* opLDIdir_A_A (c1) */ register_I = ram[(register_P << 4) + 0x01] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x4e) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L01ea: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x01ea; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x01ea; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x66; register_A = flag_C = acc_a0 = 0x0266; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opADDdir_A_AA (60) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x70]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x01f3 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 0; /* opLLT_A_AA (e4) */ {CINEBYTE temp_byte = 0; for (;;) { if ( (((register_A >> 8) & 0x0A) && (((register_A >> 8) & 0x0A) ^ 0x0A)) || (((register_B >> 8) & 0x0A) && (((register_B >> 8) & 0x0A) ^ 0x0A)) ) break; register_A <<= 1; register_B <<= 1; if (!(++temp_byte)) break /* This may not be correct */; } vgShiftLength = temp_byte & 0xfff; register_A &= 0x0FFF; register_B &= 0x0FFF; } ccpu_ICount += 1; /* opLDPimm_A_A (8c) */ register_P = 0xc; /* set page register */ ccpu_ICount += 3; /* opLDIdir_A_A (c2) */ register_I = ram[0xc2] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 3; /* opLDIdir_A_A (c1) */ register_I = ram[0xc1] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opVDR_A_A (e0) */ register_PC = 0x0201 /* Force consistency */; { /* set ending points and draw the vector, or buffer for a later draw. */ int ToX = register_A & 0xFFF; int ToY = register_B & 0xFFF; /* Sign extend from 20 bit CCPU to 32bit target machine */ FromX = SEX(FromX); ToX = SEX(ToX); FromY = SEX(FromY); ToY = SEX(ToY); /* figure out the vector */ ToX -= FromX; ToX = ((signed short int)(((signed short int)ToX) >> (signed short int)vgShiftLength)) /* SAR */; ToX += FromX; ToY -= FromY; ToY = ((signed short int)(((signed short int)ToY) >> (signed short int)vgShiftLength)) /* SAR */; ToY += FromY; /* render the line */ #ifndef DUALCPU CinemaVectorData (FromX, FromY, ToX, ToY, vgColour); #endif } ccpu_ICount += 3; /* opLDAdir_A_AA (a1) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0xc1]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xc0; register_A = flag_C = acc_a0 = 0x00c0; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0148; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0148; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x08b6; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x08b6; ccpu_ICount -= 2; goto *lab[register_PC];}; L020f: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x3f; register_A = flag_C = acc_a0 = 0x003f; ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x74; register_A = flag_C = acc_a0 = 0x0274; ccpu_ICount += 3; /* opADDdir_A_AA (67) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x7]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x021c /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = (register_P << 4) + 0x6] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x0225 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a0) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x00]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x0230 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x0233 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = (register_P << 4) + 0x3] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x7f; register_A = flag_C = acc_a0 = 0x007f; ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0243; ccpu_ICount += 2; /* opJA0_A_A (5e) */ if (acc_a0 & 0x01) {register_PC = 0x0243; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0243: ccpu_ICount += 1; /* opLDAimm_A_AA (04) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0400; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 3; /* opADDdir_A_AA (65) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x5]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opLDIdir_A_A (c1) */ register_I = ram[(register_P << 4) + 0x01] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a0) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x00]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x024b /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x024e /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = (register_P << 4) + 0x3] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x7f; register_A = flag_C = acc_a0 = 0x007f; ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x025e; ccpu_ICount += 2; /* opJA0_A_A (5e) */ if (acc_a0 & 0x01) {register_PC = 0x025e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L025e: ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 3; /* opADDdir_A_AA (66) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x6]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opLDIdir_A_A (c2) */ register_I = ram[(register_P << 4) + 0x02] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x014b; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x014b; ccpu_ICount -= 2; goto *lab[register_PC];}; L02b6: ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x1f) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x02dc; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x02dc; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xd]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x08ed; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x08ed; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opADDimm_A_AA (25) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0005))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xd]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x08ed; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opINP_A_AA (1f) */ register_PC = 0x02c5 /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0xf); ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x75] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x001e))) & 0xFFF; /* add values */ ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x02ce /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x02d0 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x02d2 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x02d4 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x02d6 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x02d8 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x08fb; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x08fb; ccpu_ICount -= 2; goto *lab[register_PC];}; L02dc: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L02de: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x73]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x02ed; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x02ed; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x08; register_A = flag_C = acc_a0 = 0x0308; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x1f] = 0x308; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0dc0; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; ccpu_ICount += 2; /* opJPP8_A_B (50) */ register_PC = 0x1dc0; /* rom offset */ {register_PC = 0x1dc0; ccpu_ICount -= 2; goto *lab[register_PC];}; L02ed: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x62] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x60] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (25) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0005))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x73]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x004a; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x004a; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x15; register_A = flag_C = acc_a0 = 0x0015; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x02fa /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x02fc /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x02fe /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x0300 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0302 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0304 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (25) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0005))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x004a; ccpu_ICount -= 2; goto *lab[register_PC];}; L0308: ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x37]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0319; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0319; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x3d]; /* set I register */ ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0319; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x33]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x33]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0319; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x30] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x3d] = 0x000; /* store acc to RAM */ L0319: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x47]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0329; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0329; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x4d]; /* set I register */ ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0329; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x43]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x43]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0329; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x40] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x4d] = 0x000; /* store acc to RAM */ L0329: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x57]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0339; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0339; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x5d]; /* set I register */ ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0339; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x53]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x53]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0339; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x50] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x5d] = 0x000; /* store acc to RAM */ L0339: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x086f; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x086f; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opINP_A_AA (16) */ register_PC = 0x033f /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0x6); ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x086f; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x086f; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b1) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x81]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x086f; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a0) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x80]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opSUBimm_A_AA (38) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x8) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x0377; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0377; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a1) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x81]; /* set I register */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0373; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0373; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xff; register_A = flag_C = acc_a0 = 0x00ff; ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x036d; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x036d; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opADDimm_A_AA (2f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000f))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0368; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0368; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0376; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0376; ccpu_ICount -= 2; goto *lab[register_PC];}; L0368: ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opSUBimm_A_AA (37) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x7) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0376; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0376; ccpu_ICount -= 2; goto *lab[register_PC];}; L036d: ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x67) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0376; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0376; ccpu_ICount -= 2; goto *lab[register_PC];}; L0373: ccpu_ICount += 1; /* opLDAimm_A_AA (09) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0900; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x99; register_A = flag_C = acc_a0 = 0x0999; L0376: ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0377: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (03) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0x0300; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d1) */ ram[register_I = (register_P << 4) + 0x1] = register_B; /* set I register and store B to ram */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x10] = 0x200; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0381; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x43) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L0386: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0386; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0386; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xcb; register_A = flag_C = acc_a0 = 0x03cb; ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = (register_P << 4) + 0x6] = 0x3cb; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xff; register_A = flag_C = acc_a0 = 0x00ff; ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = (register_P << 4) + 0x8] = 0x0ff; /* store acc to RAM */ L0392: ccpu_ICount += 3; /* opLDAdir_A_AA (a0) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x00]; /* set I register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a1) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x01]; /* new acc value */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x0399 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opCMPdir_A_AA (b8) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x8]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x03e6; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x03e6; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 3; /* opSUBdir_A_AA (70) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x0]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = (register_P << 4) + 0x3] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x03a5 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 3; /* opSUBdir_A_AA (71) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x1]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = (register_P << 4) + 0x4] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* set I register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a4) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x04]; /* new acc value */ ccpu_ICount += 0; /* opLLT_A_AA (e4) */ {CINEBYTE temp_byte = 0; for (;;) { if ( (((register_A >> 8) & 0x0A) && (((register_A >> 8) & 0x0A) ^ 0x0A)) || (((register_B >> 8) & 0x0A) && (((register_B >> 8) & 0x0A) ^ 0x0A)) ) break; register_A <<= 1; register_B <<= 1; if (!(++temp_byte)) break /* This may not be correct */; } vgShiftLength = temp_byte & 0xfff; register_A &= 0x0FFF; register_B &= 0x0FFF; } ccpu_ICount += 3; /* opADDdir_A_AA (60) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x0]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (61) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = (register_P << 4) + 0x01]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opVDR_A_A (e0) */ register_PC = 0x03b2 /* Force consistency */; { /* set ending points and draw the vector, or buffer for a later draw. */ int ToX = register_A & 0xFFF; int ToY = register_B & 0xFFF; /* Sign extend from 20 bit CCPU to 32bit target machine */ FromX = SEX(FromX); ToX = SEX(ToX); FromY = SEX(FromY); ToY = SEX(ToY); /* figure out the vector */ ToX -= FromX; ToX = ((signed short int)(((signed short int)ToX) >> (signed short int)vgShiftLength)) /* SAR */; ToX += FromX; ToY -= FromY; ToY = ((signed short int)(((signed short int)ToY) >> (signed short int)vgShiftLength)) /* SAR */; ToY += FromY; /* render the line */ #ifndef DUALCPU CinemaVectorData (FromX, FromY, ToX, ToY, vgColour); #endif } ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (60) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x0]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x04]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (61) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x1]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x83]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x03bd; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = register_A & 0x01 ? 0x0f: 0x07; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0392; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0392; ccpu_ICount -= 2; goto *lab[register_PC];}; L03e6: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x19; register_A = flag_C = acc_a0 = 0x0019; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x03e9 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x03eb /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x03ed /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x03ef /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x03f1 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x03f3 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x16; register_A = flag_C = acc_a0 = 0x0016; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x03f7 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x03f9 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x03fb /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x03fd /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x03ff /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0401 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x045e; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x045e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x30]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0424; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0424; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x3d]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0424; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x33]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0424; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x4d; register_A = flag_C = acc_a0 = 0x004d; ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x3d] = 0x04d; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x17; register_A = flag_C = acc_a0 = 0x0017; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x0419 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x041b /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x041d /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x041f /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0421 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0423 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); L0424: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x40]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0441; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0441; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x4d]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0441; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x43]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0441; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x4d; register_A = flag_C = acc_a0 = 0x004d; ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x4d] = 0x04d; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x17; register_A = flag_C = acc_a0 = 0x0017; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x0436 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x0438 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x043a /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x043c /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x043e /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0440 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); L0441: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x50]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x045e; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x045e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x5d]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x045e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x53]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x045e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x4d; register_A = flag_C = acc_a0 = 0x004d; ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x5d] = 0x04d; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x17; register_A = flag_C = acc_a0 = 0x0017; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x0453 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x0455 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x0457 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x0459 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x045b /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x045d /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); L045e: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0586; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0586; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opINP_A_AA (1e) */ register_PC = 0x0464 /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0xe); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x04d7; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x04d7; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (97) */ ccpu_ICount += 1; register_PC = 0x046b /* Force consistency */; /* opOUTsnd_A (97) */ put_io_bit(/*bitno*/0x7, /*set or clr*/0x0); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x046e; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x2a]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x28] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (04) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0400; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x78; register_A = flag_C = acc_a0 = 0x0478; ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x2d] = 0x478; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0495; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0495; ccpu_ICount -= 2; goto *lab[register_PC];}; L0495: ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x2f] = 0x800; /* store acc to RAM */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x2e] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x049c; ccpu_ICount += 2; /* opJDR_A_A (5a) */ L049d: ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opADDdir_A_AA (6f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xf]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (01) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0x0100; ccpu_ICount += 0; /* opLLT_A_AA (e4) */ {CINEBYTE temp_byte = 0; for (;;) { if ( (((register_A >> 8) & 0x0A) && (((register_A >> 8) & 0x0A) ^ 0x0A)) || (((register_B >> 8) & 0x0A) && (((register_B >> 8) & 0x0A) ^ 0x0A)) ) break; register_A <<= 1; register_B <<= 1; if (!(++temp_byte)) break /* This may not be correct */; } vgShiftLength = temp_byte & 0xfff; register_A &= 0x0FFF; register_B &= 0x0FFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x11) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L04a7: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x04a7; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x04a7; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x04b3; ccpu_ICount += 2; ccpu_ICount += 2; /* opJEI_A_A (59) */ register_PC = 0x04ae /* Force consistency */; ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x04b4; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x04b4; ccpu_ICount -= 2; goto *lab[register_PC];}; L04b4: ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x04c1; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x04c1; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x049d; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x049d; ccpu_ICount -= 2; goto *lab[register_PC];}; L04c1: ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (78) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x8]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x04cc; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x04cc; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (7e) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L04cc: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (27) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0007))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x04d4; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x04d4; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = (register_P << 4) + 0x8] = register_A; /* store acc to RAM */ L04d4: ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xd]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opLDJirg_A_A (e1) */ register_PC = 0x04d5 /* Force consistency */; /* load J reg from value at last dir addr */ register_J = ram[register_I] & 0xFFF; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = (register_PC & 0xF000) | register_J; ccpu_ICount -= 2; goto *lab[register_PC];}; L04d7: ccpu_ICount += 1; /* opINP_A_AA (11) */ register_PC = 0x04d7 /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0x1); ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x2f] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opINP_A_AA (12) */ register_PC = 0x04da /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0x2); ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 3; /* opADDdir_A_AA (6a) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x2a]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opCMPdir_A_AA (ba) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x2a]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x04f6; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x04f6; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (0e) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0e00; ccpu_ICount += 3; /* opCMPdir_A_AA (ba) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x2a]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x04f6; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (ba) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x2a]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x04f4; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x04f4; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (0e) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0e00; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x04f6; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x04f6; ccpu_ICount -= 2; goto *lab[register_PC];}; L04f4: ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L04f6: ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = (register_P << 4) + 0xc] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opINP_A_AA (13) */ register_PC = 0x04f8 /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0x3); ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x2f] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opINP_A_AA (14) */ register_PC = 0x04fb /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0x4); ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 3; /* opADDdir_A_AA (6b) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x2b]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opCMPdir_A_AA (bb) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x2b]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x051b; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x051b; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (0d) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0d00; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 3; /* opCMPdir_A_AA (bb) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x2b]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x051b; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bb) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x2b]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0518; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0518; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (0d) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0d00; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x051b; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x051b; ccpu_ICount -= 2; goto *lab[register_PC];}; L0518: ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L051b: ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = (register_P << 4) + 0xd] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xa4; register_A = flag_C = acc_a0 = 0x01a4; ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xc]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x0537; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0537; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xc]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0533; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0533; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (0e) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0e00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x84; register_A = flag_C = acc_a0 = 0x0e84; ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xc]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0536; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0536; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x0537; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0537; ccpu_ICount -= 2; goto *lab[register_PC];}; L0533: ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xa4; register_A = flag_C = acc_a0 = 0x01a4; L0536: ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = (register_P << 4) + 0xc] = register_A; /* store acc to RAM */ L0537: ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x2c; register_A = flag_C = acc_a0 = 0x012c; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xd]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0551; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0551; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xd]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x054d; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x054d; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (0e) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0e00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xd4; register_A = flag_C = acc_a0 = 0x0ed4; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xd]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0550; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0550; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0551; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0551; ccpu_ICount -= 2; goto *lab[register_PC];}; L054d: ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x2c; register_A = flag_C = acc_a0 = 0x012c; L0550: ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = (register_P << 4) + 0xd] = register_A; /* store acc to RAM */ L0551: ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opADDdir_A_AA (6d) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xd]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x64] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opADDdir_A_AA (6c) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x2c]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x63] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x1e) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x055f; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = 0x07; ccpu_ICount += 1; /* opINP_A_AA (15) */ register_PC = 0x0565 /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0x5); ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x6f] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x60]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0573; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0573; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0584; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0584; ccpu_ICount -= 2; goto *lab[register_PC];}; L0573: ccpu_ICount += 3; /* opCMPdir_A_AA (bf) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0584; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0584; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opINP_A_AA (16) */ register_PC = 0x0577 /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0x6); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0584; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b1) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x1]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0584; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0584; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (29) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0009))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = (register_P << 4) + 0x2] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = (register_P << 4) + 0x0] = register_A; /* store acc to RAM */ L0584: ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = (register_P << 4) + 0x1] = register_A; /* store acc to RAM */ L0586: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x30]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x05af; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x05af; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x37]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0599; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0599; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x3d]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0599; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x36] = 0x000; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x34]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x35]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0599: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x05ac; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x05ac; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (05) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0500; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xb6; register_A = flag_C = acc_a0 = 0x05b6; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x5b6; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x31; register_A = flag_C = acc_a0 = 0x0031; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x19] = 0x031; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0c00; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0c00; ccpu_ICount -= 2; goto *lab[register_PC];}; L05ac: ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L05af: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x64) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L05b2: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x05b2; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x05b2; ccpu_ICount -= 2; goto *lab[register_PC];}; L05b6: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0648; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0648; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x63]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x10] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x1e) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x13] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x64]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x11] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x14] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (06) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0600; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x15; register_A = flag_C = acc_a0 = 0x0615; ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x16] = 0x615; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xff; register_A = flag_C = acc_a0 = 0x00ff; ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x18] = 0x0ff; /* store acc to RAM */ L05d0: ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x05d0; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* set I register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a4) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x04]; /* new acc value */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x05da /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opCMPdir_A_AA (b8) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x8]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x05ff; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x05ff; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 3; /* opADDdir_A_AA (60) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x0]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = (register_P << 4) + 0xc] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x05e7 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x4]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 3; /* opADDdir_A_AA (61) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x1]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = (register_P << 4) + 0xd] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (ac) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0c]; /* set I register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (ad) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x0d]; /* new acc value */ ccpu_ICount += 0; /* opLLT_A_AA (e4) */ {CINEBYTE temp_byte = 0; for (;;) { if ( (((register_A >> 8) & 0x0A) && (((register_A >> 8) & 0x0A) ^ 0x0A)) || (((register_B >> 8) & 0x0A) && (((register_B >> 8) & 0x0A) ^ 0x0A)) ) break; register_A <<= 1; register_B <<= 1; if (!(++temp_byte)) break /* This may not be correct */; } vgShiftLength = temp_byte & 0xfff; register_A &= 0x0FFF; register_B &= 0x0FFF; } ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x3]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (64) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = (register_P << 4) + 0x04]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opVDR_A_A (e0) */ register_PC = 0x05f5 /* Force consistency */; { /* set ending points and draw the vector, or buffer for a later draw. */ int ToX = register_A & 0xFFF; int ToY = register_B & 0xFFF; /* Sign extend from 20 bit CCPU to 32bit target machine */ FromX = SEX(FromX); ToX = SEX(ToX); FromY = SEX(FromY); ToY = SEX(ToY); /* figure out the vector */ ToX -= FromX; ToX = ((signed short int)(((signed short int)ToX) >> (signed short int)vgShiftLength)) /* SAR */; ToX += FromX; ToY -= FromY; ToY = ((signed short int)(((signed short int)ToY) >> (signed short int)vgShiftLength)) /* SAR */; ToY += FromY; /* render the line */ #ifndef DUALCPU CinemaVectorData (FromX, FromY, ToX, ToY, vgColour); #endif } ccpu_ICount += 3; /* opLDAdir_A_AA (ac) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0c]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x3]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0d]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (64) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x4]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x05d0; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x05d0; ccpu_ICount -= 2; goto *lab[register_PC];}; L05ff: ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x0602 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opCMPdir_A_AA (b8) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x8]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0648; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0648; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opADDdir_A_AA (60) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x0]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = (register_P << 4) + 0x3] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x060e /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opADDdir_A_AA (61) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x1]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = (register_P << 4) + 0x4] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x05d0; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x05d0; ccpu_ICount -= 2; goto *lab[register_PC];}; L0648: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b2) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x62]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x06b9; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x06b9; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opINP_A_AA (18) */ register_PC = 0x064e /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0x8); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x065d; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x065d; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (26) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0006))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x065d; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x065f; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x065f; ccpu_ICount -= 2; goto *lab[register_PC];}; L065d: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ L065f: ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x001a))) & 0xFFF; /* add values */ ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x0661 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x0663 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x0665 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x0667 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0669 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x066b /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x02]; /* set I register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (75) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x0a] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x62]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b4) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x64]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d6) */ ram[register_I = (register_P << 4) + 0x6] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x64]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (76) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x66]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = 0x0b] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x0a]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0691; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ L0693: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x40]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x06cd; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x06cd; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x47]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x06a6; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x06a6; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x4d]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x06a6; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x46] = 0x000; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x44]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x45]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L06a6: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x06ca; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x06ca; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (06) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0600; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xd4; register_A = flag_C = acc_a0 = 0x06d4; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x6d4; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x41; register_A = flag_C = acc_a0 = 0x0041; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x19] = 0x041; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0c00; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0c00; ccpu_ICount -= 2; goto *lab[register_PC];}; L06b9: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1a; register_A = flag_C = acc_a0 = 0x001a; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x06bc /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x06be /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x06c0 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x06c2 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x06c4 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x06c6 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0693; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0693; ccpu_ICount -= 2; goto *lab[register_PC];}; L06ca: ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L06cd: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x64) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L06d0: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x06d0; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x06d0; ccpu_ICount -= 2; goto *lab[register_PC];}; L06d4: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b2) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x62]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x07bd; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x07bd; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opINP_A_AA (1d) */ register_PC = 0x06da /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0xd); ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0724; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0724; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = register_A & 0x01 ? 0x0f: 0x07; ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xc0; register_A = flag_C = acc_a0 = 0x0fc0; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0xfc0; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x62]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b5) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x05]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (6a) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = 0x0a]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x0b]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x06] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x05]; /* set I register */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x63]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x07] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0706; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0706; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0706: ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x64]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x08] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0716; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0716; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0716: ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opSUBimm_A_AA (33) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x3) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x07a4; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x07a4; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 0; /* opLLT_A_AA (e4) */ {CINEBYTE temp_byte = 0; for (;;) { if ( (((register_A >> 8) & 0x0A) && (((register_A >> 8) & 0x0A) ^ 0x0A)) || (((register_B >> 8) & 0x0A) && (((register_B >> 8) & 0x0A) ^ 0x0A)) ) break; register_A <<= 1; register_B <<= 1; if (!(++temp_byte)) break /* This may not be correct */; } vgShiftLength = temp_byte & 0xfff; register_A &= 0x0FFF; register_B &= 0x0FFF; } ccpu_ICount += 3; /* opADDdir_A_AA (65) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x5]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (66) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = (register_P << 4) + 0x06]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opVDR_A_A (e0) */ register_PC = 0x0720 /* Force consistency */; { /* set ending points and draw the vector, or buffer for a later draw. */ int ToX = register_A & 0xFFF; int ToY = register_B & 0xFFF; /* Sign extend from 20 bit CCPU to 32bit target machine */ FromX = SEX(FromX); ToX = SEX(ToX); FromY = SEX(FromY); ToY = SEX(ToY); /* figure out the vector */ ToX -= FromX; ToX = ((signed short int)(((signed short int)ToX) >> (signed short int)vgShiftLength)) /* SAR */; ToX += FromX; ToY -= FromY; ToY = ((signed short int)(((signed short int)ToY) >> (signed short int)vgShiftLength)) /* SAR */; ToY += FromY; /* render the line */ #ifndef DUALCPU CinemaVectorData (FromX, FromY, ToX, ToY, vgColour); #endif } ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x07a4; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x07a4; ccpu_ICount -= 2; goto *lab[register_PC];}; L0724: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = register_A & 0x01 ? 0x0f: 0x07; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x0a]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x63]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x07] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x0b]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x64]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x08] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x07]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (07) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0700; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xa4; register_A = flag_C = acc_a0 = 0x07a4; L073b: ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = (register_P << 4) + 0x1] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = (register_P << 4) + 0x2] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0b]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = (register_P << 4) + 0x3] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDdir_A_AA (68) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x8]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = (register_P << 4) + 0x9] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (67) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x7]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = (register_P << 4) + 0x4] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (07) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0700; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x81; register_A = flag_C = acc_a0 = 0x0781; ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = (register_P << 4) + 0xc] = 0x781; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x02]; /* set I register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a3) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* new acc value */ ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x074f; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x0b) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L0754: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0754; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0754; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = (register_P << 4) + 0xd] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0764; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0764; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0764: ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x04]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (72) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x2]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x076f; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x076f; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L076f: ccpu_ICount += 3; /* opADDdir_A_AA (6d) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xd]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opSUBimm_A_AA (33) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x3) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x077a; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x077a; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 0; /* opLLT_A_AA (e4) */ {CINEBYTE temp_byte = 0; for (;;) { if ( (((register_A >> 8) & 0x0A) && (((register_A >> 8) & 0x0A) ^ 0x0A)) || (((register_B >> 8) & 0x0A) && (((register_B >> 8) & 0x0A) ^ 0x0A)) ) break; register_A <<= 1; register_B <<= 1; if (!(++temp_byte)) break /* This may not be correct */; } vgShiftLength = temp_byte & 0xfff; register_A &= 0x0FFF; register_B &= 0x0FFF; } ccpu_ICount += 3; /* opADDdir_A_AA (62) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x2]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (63) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = (register_P << 4) + 0x03]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opVDR_A_A (e0) */ register_PC = 0x0779 /* Force consistency */; { /* set ending points and draw the vector, or buffer for a later draw. */ int ToX = register_A & 0xFFF; int ToY = register_B & 0xFFF; /* Sign extend from 20 bit CCPU to 32bit target machine */ FromX = SEX(FromX); ToX = SEX(ToX); FromY = SEX(FromY); ToY = SEX(ToY); /* figure out the vector */ ToX -= FromX; ToX = ((signed short int)(((signed short int)ToX) >> (signed short int)vgShiftLength)) /* SAR */; ToX += FromX; ToY -= FromY; ToY = ((signed short int)(((signed short int)ToY) >> (signed short int)vgShiftLength)) /* SAR */; ToY += FromY; /* render the line */ #ifndef DUALCPU CinemaVectorData (FromX, FromY, ToX, ToY, vgColour); #endif } L077a: ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x04]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = (register_P << 4) + 0x2] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = (register_P << 4) + 0x3] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xc]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opLDJirg_A_A (e1) */ register_PC = 0x077f /* Force consistency */; /* load J reg from value at last dir addr */ register_J = ram[register_I] & 0xFFF; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = (register_PC & 0xF000) | register_J; ccpu_ICount -= 2; goto *lab[register_PC];}; L07a4: ccpu_ICount += 1; /* opLDAimm_A_AA (04) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0400; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x63]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x65] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x62]; /* set I register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b5) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x65]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_B; /* set I register and store B to ram */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x63]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x0a] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (ab) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x0b]; /* new acc value */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x07bb; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ L07bd: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x50]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x07e6; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x07e6; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x57]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x07d0; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x07d0; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x5d]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x07d0; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x56] = 0x000; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x54]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (32) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x2) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x55]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L07d0: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x07e3; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x07e3; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (07) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0700; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xed; register_A = flag_C = acc_a0 = 0x07ed; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x7ed; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x51; register_A = flag_C = acc_a0 = 0x0051; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x19] = 0x051; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0c00; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0c00; ccpu_ICount -= 2; goto *lab[register_PC];}; L07e3: ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L07e6: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x64) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L07e9: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x07e9; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x07e9; ccpu_ICount -= 2; goto *lab[register_PC];}; L07ed: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b2) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x62]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0855; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0855; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opINP_A_AA (1d) */ register_PC = 0x07f3 /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0xd); ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x083e; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x083e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x40; register_A = flag_C = acc_a0 = 0x0040; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x040; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x62]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b5) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x05]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (6a) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = 0x0a]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x0b]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x06] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x05]; /* set I register */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x05]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x63]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x07] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0820; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0820; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0820: ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x64]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x08] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0830; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0830; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0830: ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opSUBimm_A_AA (33) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x3) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0855; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0855; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 0; /* opLLT_A_AA (e4) */ {CINEBYTE temp_byte = 0; for (;;) { if ( (((register_A >> 8) & 0x0A) && (((register_A >> 8) & 0x0A) ^ 0x0A)) || (((register_B >> 8) & 0x0A) && (((register_B >> 8) & 0x0A) ^ 0x0A)) ) break; register_A <<= 1; register_B <<= 1; if (!(++temp_byte)) break /* This may not be correct */; } vgShiftLength = temp_byte & 0xfff; register_A &= 0x0FFF; register_B &= 0x0FFF; } ccpu_ICount += 3; /* opADDdir_A_AA (65) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x5]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (66) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = (register_P << 4) + 0x06]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opVDR_A_A (e0) */ register_PC = 0x083a /* Force consistency */; { /* set ending points and draw the vector, or buffer for a later draw. */ int ToX = register_A & 0xFFF; int ToY = register_B & 0xFFF; /* Sign extend from 20 bit CCPU to 32bit target machine */ FromX = SEX(FromX); ToX = SEX(ToX); FromY = SEX(FromY); ToY = SEX(ToY); /* figure out the vector */ ToX -= FromX; ToX = ((signed short int)(((signed short int)ToX) >> (signed short int)vgShiftLength)) /* SAR */; ToX += FromX; ToY -= FromY; ToY = ((signed short int)(((signed short int)ToY) >> (signed short int)vgShiftLength)) /* SAR */; ToY += FromY; /* render the line */ #ifndef DUALCPU CinemaVectorData (FromX, FromY, ToX, ToY, vgColour); #endif } ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0855; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0855; ccpu_ICount -= 2; goto *lab[register_PC];}; L083e: ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x0a]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x63]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x07] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x0b]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x64]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x08] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x07]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x55; register_A = flag_C = acc_a0 = 0x0855; ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x073b; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x073b; ccpu_ICount -= 2; goto *lab[register_PC];}; L0855: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x62]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x085d; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x085d; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L085d: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x08ed; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x08ed; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x37]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x088e; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x088e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opADDimm_A_AA (25) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0005))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x37]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x088e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0898; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0898; ccpu_ICount -= 2; goto *lab[register_PC];}; L086f: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x18; register_A = flag_C = acc_a0 = 0x0018; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x0872 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x0874 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x0876 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x0878 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x087a /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x087c /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x16; register_A = flag_C = acc_a0 = 0x0016; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x0880 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x0882 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x0884 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x0886 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x0888 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x088a /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x045e; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x045e; ccpu_ICount -= 2; goto *lab[register_PC];}; L088e: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x47]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x08a9; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x08a9; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opADDimm_A_AA (25) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0005))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x47]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x08a9; ccpu_ICount -= 2; goto *lab[register_PC];}; L0898: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1f; register_A = flag_C = acc_a0 = 0x001f; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x089b /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x089d /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x089f /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x08a1 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x08a3 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x08a5 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x08fb; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x08fb; ccpu_ICount -= 2; goto *lab[register_PC];}; L08a9: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x57]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x08ed; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x08ed; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opADDimm_A_AA (25) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0005))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x57]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x08ed; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0898; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0898; ccpu_ICount -= 2; goto *lab[register_PC];}; L08b6: ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (ba) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x7a]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x08ed; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x08ed; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x30]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0308; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0308; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x40]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0308; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x50]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0308; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x7d]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x02b6; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x02b6; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x02de; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x02de; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x14; register_A = flag_C = acc_a0 = 0x0014; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x08d5 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x08d7 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x08d9 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x08db /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x08dd /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x08df /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x73] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x7e] = 0xf00; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x10; register_A = flag_C = acc_a0 = 0x0010; ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = 0x7c] = 0x010; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x7d] = register_A; /* store acc to RAM */ L08ed: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1e; register_A = flag_C = acc_a0 = 0x001e; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x08f0 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x08f2 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x08f4 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x08f6 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x08f8 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x08fa /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); L08fb: ccpu_ICount += 1; /* opLDAimm_A_AA (06) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0600; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x00; register_A = flag_C = acc_a0 = 0x0600; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x600; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0080; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; ccpu_ICount += 2; /* opJPP8_A_B (50) */ register_PC = 0x1080; /* rom offset */ {register_PC = 0x1080; ccpu_ICount -= 2; goto *lab[register_PC];}; L0904: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opINP_B_AA (11) */ register_PC = 0x0905 /* Force consistency */; flag_C = acc_a0 = register_A; cmp_old = register_B; /* save old accB */ #ifdef DUALCPU register_B = cmp_new = (( ioSwitches >> ( rom [ register_PC ] & 0x07 ) ) & 0x01); #else register_B = cmp_new = get_shield_bit2(); #endif ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLSLe_B_AA (ec) */ cmp_new = 0x0CEC; acc_a0 = register_A; cmp_old = register_B; flag_C = (0x0CEC + register_B); register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d2) */ ram[register_I = (register_P << 4) + 0x2] = register_B; /* set I register and store B to ram */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opINP_B_AA (14) */ register_PC = 0x090c /* Force consistency */; flag_C = acc_a0 = register_A; cmp_old = register_B; /* save old accB */ #ifdef DUALCPU register_B = cmp_new = (( ioSwitches >> ( rom [ register_PC ] & 0x07 ) ) & 0x01); #else register_B = cmp_new = get_shield_bit1(); #endif ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opAWDirg_B_AA (e7) */ acc_a0 = register_A; cmp_old = register_B; register_B = (flag_C = (register_B + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLSLe_B_AA (ec) */ cmp_new = 0x0CEC; acc_a0 = register_A; cmp_old = register_B; flag_C = (0x0CEC + register_B); register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAirg_B_BB (e6) */ ram[register_I] = register_B; /* store acc */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opINP_B_AA (15) */ register_PC = 0x0914 /* Force consistency */; flag_C = acc_a0 = register_A; cmp_old = register_B; /* save old accB */ #ifdef DUALCPU register_B = cmp_new = (( ioSwitches >> ( rom [ register_PC ] & 0x07 ) ) & 0x01); #else register_B = cmp_new = get_shield_bit0(); #endif ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opAWDirg_B_AA (e7) */ acc_a0 = register_A; cmp_old = register_B; register_B = (flag_C = (register_B + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAirg_B_BB (e6) */ ram[register_I] = register_B; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0026; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0026; ccpu_ICount -= 2; goto *lab[register_PC];}; L0c00: ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x10] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x11] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x12] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x13] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x14] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x15] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x1a] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opSUBdir_A_AA (70) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x10]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x16] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1e; register_A = flag_C = acc_a0 = 0x001e; ccpu_ICount += 3; /* opCMPdir_A_AA (b6) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x16]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0c48; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0c48; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (b6) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x16]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0c44; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0c44; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x1e) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opCMPdir_A_AA (b6) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x16]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x0c47; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0c47; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0c48; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0c48; ccpu_ICount -= 2; goto *lab[register_PC];}; L0c44: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1e; register_A = flag_C = acc_a0 = 0x001e; L0c47: ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = (register_P << 4) + 0x6] = register_A; /* store acc to RAM */ L0c48: ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = (register_P << 4) + 0xb] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opSUBdir_A_AA (71) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x1]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = (register_P << 4) + 0x7] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1e; register_A = flag_C = acc_a0 = 0x001e; ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x0c6e; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0c6e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x0c6a; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0c6a; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x1e) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x0c6d; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0c6d; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x0c6e; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0c6e; ccpu_ICount -= 2; goto *lab[register_PC];}; L0c6a: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1e; register_A = flag_C = acc_a0 = 0x001e; L0c6d: ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = (register_P << 4) + 0x7] = register_A; /* store acc to RAM */ L0c6e: ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opCMPdir_A_AA (b2) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x2]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0c81; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0c81; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x40; register_A = flag_C = acc_a0 = 0x0040; ccpu_ICount += 3; /* opSUBdir_A_AA (76) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x6]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x40; register_A = flag_C = acc_a0 = 0x0040; ccpu_ICount += 3; /* opSUBdir_A_AA (77) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0c81: ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (36) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x6) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x7f; register_A = flag_C = acc_a0 = 0x007f; ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x0c9e; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0c9e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x40; register_A = flag_C = acc_a0 = 0x0040; ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x0c9c; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0c9c; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x0c9e; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0c9e; ccpu_ICount -= 2; goto *lab[register_PC];}; L0c9c: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ L0c9e: ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x3]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (0c) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0c00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xa9; register_A = flag_C = acc_a0 = 0x0ca9; ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = 0xca9; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x0eeb; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0eeb; ccpu_ICount -= 2; goto *lab[register_PC];}; L0ca9: ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = (register_P << 4) + 0xc] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0b]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = (register_P << 4) + 0xd] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x4]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x7f; register_A = flag_C = acc_a0 = 0x007f; ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x0cca; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0cca; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x40; register_A = flag_C = acc_a0 = 0x0040; ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0cc8; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0cc8; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x0cca; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0cca; ccpu_ICount -= 2; goto *lab[register_PC];}; L0cc8: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ L0cca: ccpu_ICount += 3; /* opADDdir_A_AA (64) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x4]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (0c) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0c00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xd5; register_A = flag_C = acc_a0 = 0x0cd5; ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = 0xcd5; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x0eeb; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0eeb; ccpu_ICount -= 2; goto *lab[register_PC];}; L0cd5: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (ac) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0c]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x0cde; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0cde; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0cde: ccpu_ICount += 3; /* opCMPdir_A_AA (bb) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xb]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xc]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d3) */ ram[register_I = (register_P << 4) + 0x3] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0cf2; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0cf2; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0cf2: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x0cfb; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0cfb; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0cfb: ccpu_ICount += 3; /* opCMPdir_A_AA (b5) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d3) */ ram[register_I = (register_P << 4) + 0x3] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x0d0f; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0d0f; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0d0f: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0d18; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0d18; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0d18: ccpu_ICount += 3; /* opCMPdir_A_AA (b5) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (ba) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xa]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d4) */ ram[register_I = (register_P << 4) + 0x4] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x0d2c; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0d2c; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x4]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0d2c: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0d]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0d35; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0d35; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0d35: ccpu_ICount += 3; /* opCMPdir_A_AA (bb) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xb]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xd]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (df) */ ram[register_I = (register_P << 4) + 0xf] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0d49; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0d49; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (7f) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0d49: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0d52; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0d52; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0d52: ccpu_ICount += 3; /* opCMPdir_A_AA (b5) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bf) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0d66; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0d66; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (75) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0d66: ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (34) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x4) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* set I register */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = (register_P << 4) + 0x0] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x04]; /* set I register */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = (register_P << 4) + 0x1] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (75) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = (register_P << 4) + 0x2] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (29) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0009))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x12]; /* set I register */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x09] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a0) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x10]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a1) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x11]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x06] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x0d] = 0x200; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x000; /* store acc to RAM */ L0d93: ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0d]; /* set I register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x9]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0e03; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0e03; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0da4; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0da4; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L0da4: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x0dae; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0dae; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L0dae: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0db8; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0db8; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L0db8: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0dc2; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0dc2; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); L0dc0: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L0dc2: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x0dcc; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0dcc; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L0dcc: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0dd6; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0dd6; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L0dd6: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0de0; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0de0; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L0de0: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x0dea; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0dea; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L0dea: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0df4; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0df4; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L0df4: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x0dfe; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0dfe; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L0dfe: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d9) */ ram[register_I = (register_P << 4) + 0x9] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x0e0b; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0e0b; ccpu_ICount -= 2; goto *lab[register_PC];}; L0e03: ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = (register_P << 4) + 0xd] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x04]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0d93; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0d93; ccpu_ICount -= 2; goto *lab[register_PC];}; L0e0b: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0e14; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0e14; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0e14: ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x9]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d7) */ ram[register_I = (register_P << 4) + 0x7] = register_B; /* set I register and store B to ram */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (b5) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x0e2a; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0e2a; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (77) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0e2a: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0e33; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0e33; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0e33: ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x9]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d8) */ ram[register_I = (register_P << 4) + 0x8] = register_B; /* set I register and store B to ram */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (b6) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x6]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0e49; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0e49; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (78) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x8]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0e49: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opSUBdir_B_AA (74) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = ram[register_I = (register_P << 4) + 0x04]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x0e5b; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0e5b; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0e52; L0e52: ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (67) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x7]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (68) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x8]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0e52; ccpu_ICount -= 2; goto *lab[register_PC];}; L0e5b: ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opADDdir_A_AA (68) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x8]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opADDdir_A_AA (67) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x07]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b2) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x62]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x0ee7; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0ee7; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (b2) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x62]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0ee7; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b2) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x12]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0ee7; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0016))) & 0xFFF; /* add values */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x09] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (ac) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x2c]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (77) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x07]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0e90; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0e90; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0e90: ccpu_ICount += 3; /* opSUBdir_A_AA (79) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x9]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x0ee7; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0ee7; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x2d]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (78) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x08]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (a8) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x08]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0ea0; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0ea0; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L0ea0: ccpu_ICount += 3; /* opSUBdir_A_AA (79) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x9]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x0ee7; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0ee7; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (34) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x4) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0eac: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x6f] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (2f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000f))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x71] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b4) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x24]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opADDdir_A_AA (6b) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x6b]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opSUBimm_A_AA (3a) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0xa) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0ec0; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0ec0; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x6f] = register_A; /* store acc to RAM */ L0ec0: ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x24]; /* set I register */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opADDdir_A_AA (6f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x6f]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opADDdir_A_AA (6a) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x6a]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (2f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000f))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 1; /* opSUBimm_A_AA (3a) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0xa) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x0edf; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0edf; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opADDimm_A_AA (26) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0006))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xf0; register_A = flag_C = acc_a0 = 0x00f0; ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0xa0) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x0edf; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0060))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0edf: ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x29]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opSUBimm_A_AA (33) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x3) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x0eac; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x0eac; ccpu_ICount -= 2; goto *lab[register_PC];}; L0ee7: ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x00]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opLDJirg_A_A (e1) */ register_PC = 0x0ee9 /* Force consistency */; /* load J reg from value at last dir addr */ register_J = ram[register_I] & 0xFFF; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = (register_PC & 0xF000) | register_J; ccpu_ICount -= 2; goto *lab[register_PC];}; L0eeb: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x7f; register_A = flag_C = acc_a0 = 0x007f; ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x6c; register_A = flag_C = acc_a0 = 0x0f6c; ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = (register_P << 4) + 0xa] = 0xf6c; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x20; register_A = flag_C = acc_a0 = 0x0020; ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0f15; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0f15; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0f21; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0f21; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0020))) & 0xFFF; /* add values */ ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0f35; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x0f35; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x0f0b /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = (register_P << 4) + 0xb] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0060))) & 0xFFF; /* add values */ ccpu_ICount += 3; /* opSUBdir_A_AA (7e) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0f43; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0f43; ccpu_ICount -= 2; goto *lab[register_PC];}; L0f15: ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (7e) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x0f17 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = (register_P << 4) + 0xb] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x4c; register_A = flag_C = acc_a0 = 0x0f4c; ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x0f2f; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0f2f; ccpu_ICount -= 2; goto *lab[register_PC];}; L0f21: ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x40) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x0f25 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = (register_P << 4) + 0xb] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0020))) & 0xFFF; /* add values */ ccpu_ICount += 3; /* opSUBdir_A_AA (7e) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ L0f2f: ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x0f2f /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = (register_P << 4) + 0xa] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0f49; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x0f49; ccpu_ICount -= 2; goto *lab[register_PC];}; L0f35: ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0040))) & 0xFFF; /* add values */ ccpu_ICount += 3; /* opSUBdir_A_AA (7e) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x0f39 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = (register_P << 4) + 0xb] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x60) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L0f43: ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x0f43 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = (register_P << 4) + 0xa] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L0f49: ccpu_ICount += 3; /* opCMPdir_A_AA (bf) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opLDJirg_A_A (e1) */ register_PC = 0x0f4a /* Force consistency */; /* load J reg from value at last dir addr */ register_J = ram[register_I] & 0xFFF; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = (register_PC & 0xF000) | register_J; ccpu_ICount -= 2; goto *lab[register_PC];}; /*********************************************************/ L1000: state = state_A; /* Even if it's not! :-) */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0d70; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1d70; ccpu_ICount -= 2; goto *lab[register_PC];}; L1005: ccpu_ICount += 0; /* opWAI_A_A (e5) */ /* wait for a tick on the watchdog */ #ifndef DUALCPU CinemaClearScreen(); bNewFrame = 1; bailOut = TRUE; #endif register_PC = 0x1006; continue; /* NOT REALLY A JUMP - ACTUALLY FOR GETTING BACK TO POLLING LOOP - NEEDS WORK */ L1006: ccpu_ICount += 0; /* opWAI_A_A (e5) */ /* wait for a tick on the watchdog */ #ifndef DUALCPU CinemaClearScreen(); bNewFrame = 1; bailOut = TRUE; #endif register_PC = 0x1007; continue; /* NOT REALLY A JUMP - ACTUALLY FOR GETTING BACK TO POLLING LOOP - NEEDS WORK */ L1007: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = 0x07; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x10] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x11] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opAWDirg_A_AA (f7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (03) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0x0300; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x38) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L1015: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0015; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1015; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = (register_P << 4) + 0x2] = 0x100; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = (register_P << 4) + 0xc] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = (register_P << 4) + 0xa] = 0x000; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xff; register_A = flag_C = acc_a0 = 0x00ff; ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = (register_P << 4) + 0xd] = 0x0ff; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = (register_P << 4) + 0xb] = 0x0ff; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x31; register_A = flag_C = acc_a0 = 0x0031; ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = (register_P << 4) + 0x6] = 0x031; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x2e; register_A = flag_C = acc_a0 = 0x005f; ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = (register_P << 4) + 0x7] = 0x05f; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x05; register_A = flag_C = acc_a0 = 0x0005; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x2f] = 0x005; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0128; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1128; ccpu_ICount -= 2; goto *lab[register_PC];}; L1058: ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1128; ccpu_ICount -= 2; goto *lab[register_PC];}; L1072: ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = 0x07; ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0128; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1128; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = register_A & 0x01 ? 0x0f: 0x07; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1128; ccpu_ICount -= 2; goto *lab[register_PC];}; L1080: ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x30]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0094; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1094; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x3b; register_A = flag_C = acc_a0 = 0x003b; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x19] = 0x03b; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x94; register_A = flag_C = acc_a0 = 0x0094; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x2f] = 0x094; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x00b7; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x10b7; ccpu_ICount -= 2; goto *lab[register_PC];}; L1094: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x40]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x00a7; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x10a7; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x4b; register_A = flag_C = acc_a0 = 0x004b; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x19] = 0x04b; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xa7; register_A = flag_C = acc_a0 = 0x00a7; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x2f] = 0x0a7; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x00b7; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x10b7; ccpu_ICount -= 2; goto *lab[register_PC];}; L10a7: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x50]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x047d; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x147d; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x5b; register_A = flag_C = acc_a0 = 0x005b; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x19] = 0x05b; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (04) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0400; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x7d; register_A = flag_C = acc_a0 = 0x047d; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x2f] = 0x47d; /* store acc to RAM */ L10b7: ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x26] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x13] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (04) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0400; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x13]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0479; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1479; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x27] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x27]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1479; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x13]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x00d3; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (3c) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0xc) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[0x19] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x17] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x16] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x10de /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x10e4 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = (register_P << 4) + 0x0] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = (register_P << 4) + 0x1] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = (register_P << 4) + 0x2] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x0d; register_A = flag_C = acc_a0 = 0x010d; ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = 0x10d; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0575; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1575; ccpu_ICount -= 2; goto *lab[register_PC];}; L110d: ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = (register_P << 4) + 0xc] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0b]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = (register_P << 4) + 0xd] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1e; register_A = flag_C = acc_a0 = 0x011e; ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = 0x11e; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0575; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1575; ccpu_ICount -= 2; goto *lab[register_PC];}; L111e: ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c9) */ register_I = ram[(register_P << 4) + 0x09] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = (register_P << 4) + 0x9] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0072; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1072; ccpu_ICount -= 2; goto *lab[register_PC];}; L1128: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xff; register_A = flag_C = acc_a0 = 0x00ff; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x18] = 0x0ff; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x16]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (33) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x3) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opSUBimm_A_AA (32) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x2) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = register_A; /* store acc to RAM */ L1134: ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x03]; /* set I register */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x039c; ccpu_ICount += 2; /* opJA0_A_A (5e) */ if (acc_a0 & 0x01) {register_PC = 0x139c; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x16]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x113e /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opCMPdir_A_AA (b8) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x8]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0471; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1471; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = (register_P << 4) + 0x3] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x114b /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = (register_P << 4) + 0x4] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x1154 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x03]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x13]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x14]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (ac) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x1c]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (6d) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x1d]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x1f] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x1f]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0172; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1172; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L1172: ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bf) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (df) */ ram[register_I = (register_P << 4) + 0xf] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0186; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1186; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (7f) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L1186: ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x04]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x3]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x4]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (ac) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0c]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0195; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1195; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L1195: ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xc]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d3) */ ram[register_I = (register_P << 4) + 0x3] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x01a9; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x11a9; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L11a9: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0d]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x01b2; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x11b2; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L11b2: ccpu_ICount += 3; /* opCMPdir_A_AA (b4) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x4]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xd]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d4) */ ram[register_I = (register_P << 4) + 0x4] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x01c6; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x11c6; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x4]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L11c6: ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x4]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x04]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (6b) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xb]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x01e0; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x11e0; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L11e0: ccpu_ICount += 3; /* opCMPdir_A_AA (b4) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x4]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bf) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (df) */ ram[register_I = (register_P << 4) + 0xf] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x01f4; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x11f4; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (7f) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L11f4: ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (64) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x4]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opSUBdir_A_AA (75) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0203; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1203; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L1203: ccpu_ICount += 3; /* opCMPdir_A_AA (b4) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x4]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (ba) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xa]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d4) */ ram[register_I = (register_P << 4) + 0x4] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x0217; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1217; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x4]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L1217: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0b]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0220; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1220; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L1220: ccpu_ICount += 3; /* opCMPdir_A_AA (b5) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bb) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xb]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0234; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1234; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (75) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L1234: ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (74) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x4]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (75) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (ac) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0c]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (6d) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xd]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x024e; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x124e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L124e: ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bf) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (df) */ ram[register_I = (register_P << 4) + 0xf] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0262; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1262; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (7f) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L1262: ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x3]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opSUBdir_A_AA (75) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (ac) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0c]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0271; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1271; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L1271: ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xc]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d3) */ ram[register_I = (register_P << 4) + 0x3] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0285; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1285; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L1285: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0d]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x028e; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x128e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L128e: ccpu_ICount += 3; /* opCMPdir_A_AA (b5) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xd]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x02a2; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x12a2; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (75) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L12a2: ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (73) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (75) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 3; /* opADDdir_A_AA (60) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x0]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x14]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 3; /* opADDdir_A_AA (61) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x11]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x06] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x15]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 3; /* opADDdir_A_AA (62) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x12]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x09] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x0d] = 0x200; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x000; /* store acc to RAM */ L12c3: ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0d]; /* set I register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x9]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0333; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1333; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x02d4; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x12d4; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L12d4: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x02de; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x12de; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L12de: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x02e8; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x12e8; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L12e8: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x02f2; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x12f2; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L12f2: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x02fc; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x12fc; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L12fc: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0306; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1306; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L1306: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0310; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1310; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L1310: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x031a; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x131a; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L131a: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0324; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1324; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L1324: ccpu_ICount += 1; /* opLSLDe_A_AA (ef) */ cmp_new = 0x0FEF; cmp_old = acc_a0 = register_A; flag_C = (0x0FEF + register_A); register_A = (register_A << 1) & 0xFFF; register_B = (register_B << 1) & 0xFFF; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x032e; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x132e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opSUBimm_B_AA (31) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = 0x1) ^ 0xFFF) + 1)) & 0xFFF; /* 1's-comp add */ L132e: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d9) */ ram[register_I = (register_P << 4) + 0x9] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x033b; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x133b; ccpu_ICount -= 2; goto *lab[register_PC];}; L1333: ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = (register_P << 4) + 0xd] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a4) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x04]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x02c3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x12c3; ccpu_ICount -= 2; goto *lab[register_PC];}; L133b: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0344; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1344; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L1344: ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x9]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d7) */ ram[register_I = (register_P << 4) + 0x7] = register_B; /* set I register and store B to ram */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (b5) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x5]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x035a; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x135a; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (77) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L135a: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0363; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1363; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L1363: ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x9]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d8) */ ram[register_I = (register_P << 4) + 0x8] = register_B; /* set I register and store B to ram */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opCMPdir_A_AA (b6) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x6]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0379; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1379; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (78) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x8]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L1379: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opSUBdir_B_AA (74) */ acc_a0 = register_A; register_B = (flag_C = ((cmp_old = register_B) + ((cmp_new = ram[register_I = (register_P << 4) + 0x04]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x038b; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x138b; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0382; L1382: ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (67) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x7]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (68) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x8]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opADDimm_B_AA (21) */ acc_a0 = register_A; /* save old accA bit0 */ cmp_old = register_B; /* store old acc for later */ register_B = (flag_C = (register_B + (cmp_new = 0x01))) & 0xFFF; /* add values */ ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1382; ccpu_ICount -= 2; goto *lab[register_PC];}; L138b: ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* set I register */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x00e0))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDdir_A_AA (67) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x7]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (ce) */ register_I = ram[(register_P << 4) + 0x0e] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opADDdir_A_AA (68) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x8]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (cf) */ register_I = ram[(register_P << 4) + 0x0f] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L139c: ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x17]; /* set I register */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x139e /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opCMPdir_A_AA (b8) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x8]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0479; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1479; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0134; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = 0x0b] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x03]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1134; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x0a] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (2f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000f))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (bb) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x0b]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x03]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1134; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x00e0))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDIdir_A_A (cf) */ register_I = ram[0x0f] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x06] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 3; /* opCMPdir_A_AA (b6) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x06]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0454; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1454; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDIdir_A_A (ce) */ register_I = ram[0x0e] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (04) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0400; ccpu_ICount += 3; /* opCMPdir_A_AA (b5) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x05]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1454; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x0b]; /* set I register */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x00e0))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDIdir_A_A (cf) */ register_I = ram[0x0f] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x08] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 3; /* opCMPdir_A_AA (b8) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x08]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1454; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDIdir_A_A (ce) */ register_I = ram[0x0e] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x07] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (04) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0400; ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x07]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1454; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a8) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x08]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (76) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x06]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x08] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x07]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (75) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x05]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x07] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x19]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x041e; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x141e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x05]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (76) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x26]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = 0x0c] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x0c]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (66) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = 0x26]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_B; /* set I register and store B to ram */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x06]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (77) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x27]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = 0x0c] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (00) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x19]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x0c]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 2; /* opMULirg_A_AA (e3) */ cmp_new = ram[register_I]; register_B <<= 4; /* get sign bit 15 */ register_B |= (register_A >> 8); /* bring in A high nibble */ register_A = ((register_A & 0xFF) << 8) | (0xe3); /* pick up opcode */ if (register_A & 0x100) /* 1bit shifted out? */ { acc_a0 = register_A = (register_A >> 8) | ((register_B & 0xFF) << 8); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)4)) /* SAR */; cmp_old = register_B & 0x0F; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)1)) /* SAR */; register_B &= 0xFFF; flag_C = (register_B += cmp_new); register_B &= 0xFFF; } else { register_A = (register_A >> 8) | /* Bhigh | Alow */ ((register_B & 0xFF) << 8); cmp_old = acc_a0 = register_A & 0xFFF; flag_C = (cmp_old + cmp_new); register_A >>= 1; register_A &= 0xFFF; register_B = ((signed short int)(((signed short int)register_B) >> (signed short int)5)) /* SAR */; register_B &= 0xFFF; } ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (67) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = 0x27]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d6) */ ram[register_I = (register_P << 4) + 0x6] = register_B; /* set I register and store B to ram */ L141e: ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x05]; /* set I register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a6) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* new acc value */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0422; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x07]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x042d; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x142d; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L142d: ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = (register_P << 4) + 0xc] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opLDAdir_A_AA (a8) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x08]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0436; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1436; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ L1436: ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opSUBimm_A_AA (33) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x3) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0454; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1454; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x08) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L1440: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0440; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1440; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 1; /* opSUBimm_A_AA (37) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x7) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opCMPdir_A_AA (bf) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x045b; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x145b; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xc]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x145b; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a8) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x08]; /* new acc value */ ccpu_ICount += 0; /* opLLT_A_AA (e4) */ {CINEBYTE temp_byte = 0; for (;;) { if ( (((register_A >> 8) & 0x0A) && (((register_A >> 8) & 0x0A) ^ 0x0A)) || (((register_B >> 8) & 0x0A) && (((register_B >> 8) & 0x0A) ^ 0x0A)) ) break; register_A <<= 1; register_B <<= 1; if (!(++temp_byte)) break /* This may not be correct */; } vgShiftLength = temp_byte & 0xfff; register_A &= 0x0FFF; register_B &= 0x0FFF; } ccpu_ICount += 3; /* opADDdir_A_AA (65) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x5]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (66) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = (register_P << 4) + 0x06]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opVDR_A_A (e0) */ register_PC = 0x1453 /* Force consistency */; { /* set ending points and draw the vector, or buffer for a later draw. */ int ToX = register_A & 0xFFF; int ToY = register_B & 0xFFF; /* Sign extend from 20 bit CCPU to 32bit target machine */ FromX = SEX(FromX); ToX = SEX(ToX); FromY = SEX(FromY); ToY = SEX(ToY); /* figure out the vector */ ToX -= FromX; ToX = ((signed short int)(((signed short int)ToX) >> (signed short int)vgShiftLength)) /* SAR */; ToX += FromX; ToY -= FromY; ToY = ((signed short int)(((signed short int)ToY) >> (signed short int)vgShiftLength)) /* SAR */; ToY += FromY; /* render the line */ #ifndef DUALCPU CinemaVectorData (FromX, FromY, ToX, ToY, vgColour); #endif } L1454: ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x17]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x039c; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x139c; ccpu_ICount -= 2; goto *lab[register_PC];}; L145b: ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a8) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x08]; /* new acc value */ ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAirg_B_BB (e6) */ ram[register_I] = register_B; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 0; /* opLLT_A_AA (e4) */ {CINEBYTE temp_byte = 0; for (;;) { if ( (((register_A >> 8) & 0x0A) && (((register_A >> 8) & 0x0A) ^ 0x0A)) || (((register_B >> 8) & 0x0A) && (((register_B >> 8) & 0x0A) ^ 0x0A)) ) break; register_A <<= 1; register_B <<= 1; if (!(++temp_byte)) break /* This may not be correct */; } vgShiftLength = temp_byte & 0xfff; register_A &= 0x0FFF; register_B &= 0x0FFF; } ccpu_ICount += 3; /* opADDdir_A_AA (65) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x5]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (66) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = (register_P << 4) + 0x06]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opVDR_A_A (e0) */ register_PC = 0x1467 /* Force consistency */; { /* set ending points and draw the vector, or buffer for a later draw. */ int ToX = register_A & 0xFFF; int ToY = register_B & 0xFFF; /* Sign extend from 20 bit CCPU to 32bit target machine */ FromX = SEX(FromX); ToX = SEX(ToX); FromY = SEX(FromY); ToY = SEX(ToY); /* figure out the vector */ ToX -= FromX; ToX = ((signed short int)(((signed short int)ToX) >> (signed short int)vgShiftLength)) /* SAR */; ToX += FromX; ToY -= FromY; ToY = ((signed short int)(((signed short int)ToY) >> (signed short int)vgShiftLength)) /* SAR */; ToY += FromY; /* render the line */ #ifndef DUALCPU CinemaVectorData (FromX, FromY, ToX, ToY, vgColour); #endif } ccpu_ICount += 3; /* opLDAdir_A_AA (a8) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x08]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (66) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x6]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (65) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x5]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x041e; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x141e; ccpu_ICount -= 2; goto *lab[register_PC];}; L1471: ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x03]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x039c; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x139c; ccpu_ICount -= 2; goto *lab[register_PC];}; L1479: ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (bf) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x2f]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opLDJirg_A_A (e1) */ register_PC = 0x147b /* Force consistency */; /* load J reg from value at last dir addr */ register_J = ram[register_I] & 0xFFF; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = (register_PC & 0xF000) | register_J; ccpu_ICount -= 2; goto *lab[register_PC];}; L147d: ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x00]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opLDJirg_A_A (e1) */ register_PC = 0x147f /* Force consistency */; /* load J reg from value at last dir addr */ register_J = ram[register_I] & 0xFFF; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = (register_PC & 0xF000) | register_J; ccpu_ICount -= 2; goto *lab[register_PC];}; L1575: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x7f; register_A = flag_C = acc_a0 = 0x007f; ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (05) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0500; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xf6; register_A = flag_C = acc_a0 = 0x05f6; ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = (register_P << 4) + 0xa] = 0x5f6; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x20; register_A = flag_C = acc_a0 = 0x0020; ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x059f; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x159f; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x05ab; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x15ab; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0020))) & 0xFFF; /* add values */ ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x05bf; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x15bf; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x1595 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = (register_P << 4) + 0xb] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0060))) & 0xFFF; /* add values */ ccpu_ICount += 3; /* opSUBdir_A_AA (7e) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x05cd; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x15cd; ccpu_ICount -= 2; goto *lab[register_PC];}; L159f: ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opSUBdir_A_AA (7e) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x15a1 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = (register_P << 4) + 0xb] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (05) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0500; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xd6; register_A = flag_C = acc_a0 = 0x05d6; ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x05b9; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x15b9; ccpu_ICount -= 2; goto *lab[register_PC];}; L15ab: ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x40) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x15af /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = (register_P << 4) + 0xb] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0020))) & 0xFFF; /* add values */ ccpu_ICount += 3; /* opSUBdir_A_AA (7e) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ L15b9: ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x15b9 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = (register_P << 4) + 0xa] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x05d3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x15d3; ccpu_ICount -= 2; goto *lab[register_PC];}; L15bf: ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0040))) & 0xFFF; /* add values */ ccpu_ICount += 3; /* opSUBdir_A_AA (7e) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x15c3 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = (register_P << 4) + 0xb] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0xe]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x60) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L15cd: ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x15cd /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = (register_P << 4) + 0xa] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L15d3: ccpu_ICount += 3; /* opCMPdir_A_AA (bf) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opLDJirg_A_A (e1) */ register_PC = 0x15d4 /* Force consistency */; /* load J reg from value at last dir addr */ register_J = ram[register_I] & 0xFFF; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = (register_PC & 0xF000) | register_J; ccpu_ICount -= 2; goto *lab[register_PC];}; L1600: ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (02) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0x0200; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDimmX_B_AA (20) */ cmp_old = register_B; acc_a0 = register_A; /* save old accA bit0 */ cmp_new = 0x76; register_B = flag_C = 0x0276; cmp_new = 0x76; /* No carry */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xa0; register_A = flag_C = acc_a0 = 0x00a0; ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x060b; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x38) ^ 0xFFF) + 1))) & 0xFFF; /* add */ L1610: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0610; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1610; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x063a; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x163a; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = 0x07; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x96; register_A = flag_C = acc_a0 = 0x0096; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = 0x096; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x8a; register_A = flag_C = acc_a0 = 0x028a; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x28a; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x11; register_A = flag_C = acc_a0 = 0x0011; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = 0x011; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (06) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0600; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x33; register_A = flag_C = acc_a0 = 0x0633; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x633; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x07; register_A = flag_C = acc_a0 = 0x063a; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x63a; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0af3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1af3; ccpu_ICount -= 2; goto *lab[register_PC];}; L163a: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a1) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x71]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0644; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1644; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ L1644: ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = register_A & 0x01 ? 0x0f: 0x07; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x10; register_A = flag_C = acc_a0 = 0x0010; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x1648 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x164a /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x164c /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x164e /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1650 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1652 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xa0; register_A = flag_C = acc_a0 = 0x00a0; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = 0x0a0; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x58; register_A = flag_C = acc_a0 = 0x0258; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x258; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x07; register_A = flag_C = acc_a0 = 0x0007; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = 0x007; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x02] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x6a; register_A = flag_C = acc_a0 = 0x006a; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x06a; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (06) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0600; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x71; register_A = flag_C = acc_a0 = 0x0671; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x671; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0af3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1af3; ccpu_ICount -= 2; goto *lab[register_PC];}; L1671: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xb8; register_A = flag_C = acc_a0 = 0x00b8; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = 0x0b8; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x58; register_A = flag_C = acc_a0 = 0x0258; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x258; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x07; register_A = flag_C = acc_a0 = 0x0007; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = 0x007; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x02] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x6b; register_A = flag_C = acc_a0 = 0x006b; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x06b; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (06) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0600; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x8f; register_A = flag_C = acc_a0 = 0x068f; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x68f; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0af3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1af3; ccpu_ICount -= 2; goto *lab[register_PC];}; L168f: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a0) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x20]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x069a; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x169a; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0704; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1704; ccpu_ICount -= 2; goto *lab[register_PC];}; L169a: ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x3f] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x4f] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x5f] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opADDimm_A_AA (24) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0004))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x25] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x16a7 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = (register_P << 4) + 0x0] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0xff) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x06b3; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x16b3; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xff; register_A = flag_C = acc_a0 = 0x02ff; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L16b3: ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x3f]; /* set I register */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x16b5 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = (register_P << 4) + 0x8] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x16be /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = (register_P << 4) + 0x9] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x16c7 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = (register_P << 4) + 0xa] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x4f]; /* set I register */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x16d0 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = (register_P << 4) + 0x8] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x16d9 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = (register_P << 4) + 0x9] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x16e2 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = (register_P << 4) + 0xa] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x5f]; /* set I register */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x16eb /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = (register_P << 4) + 0x8] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x16f4 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = (register_P << 4) + 0x9] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x16fd /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = (register_P << 4) + 0xa] = register_A; /* store acc to RAM */ L1704: ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x89]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x7a] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x78] = 0x800; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opINP_B_AA (17) */ register_PC = 0x170c /* Force consistency */; flag_C = acc_a0 = register_A; cmp_old = register_B; /* save old accB */ #ifdef DUALCPU register_B = cmp_new = (( ioSwitches >> ( rom [ register_PC ] & 0x07 ) ) & 0x01); #else register_B = cmp_new = get_coin_state(); /* apparently not used in tailgunner??? */ #endif ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (95) */ ccpu_ICount += 1; register_PC = 0x170f /* Force consistency */; /* opOUTsnd_A (95) */ reset_coin_counter(register_A&1); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (95) */ ccpu_ICount += 1; register_PC = 0x1711 /* Force consistency */; /* opOUTsnd_A (95) */ reset_coin_counter(register_A&1); ccpu_ICount += 3; /* opCMPdir_A_AA (b8) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x78]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x072e; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x172e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opINP_B_AA (10) */ register_PC = 0x171a /* Force consistency */; flag_C = acc_a0 = register_A; cmp_old = register_B; /* save old accB */ #ifdef DUALCPU register_B = cmp_new = (( ioSwitches >> ( rom [ register_PC ] & 0x07 ) ) & 0x01); #else register_B = cmp_new = get_quarters_per_game(); /* 1 => 1q/game, 0 => 2q/game */ #endif ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opCMPdir_B_AA (b8) */ acc_a0 = register_A; flag_C = ((((cmp_new = ram[register_I = (register_P << 4) + 0x8]) ^ 0xFFF) + 1) + (cmp_old = register_B)); /* ones compliment */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x072b; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x172b; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x79]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x79]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x072e; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x172e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L172b: ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L172e: ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x7a]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x89] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x7a] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x07b9; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x17b9; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = 0x07; ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a1) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x81]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0749; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1749; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opSUBimm_A_AA (3a) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0xa) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1749; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x8b]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = register_A & 0x01 ? 0x0f: 0x07; L1749: ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xcc; register_A = flag_C = acc_a0 = 0x01cc; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = 0x1cc; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x8a; register_A = flag_C = acc_a0 = 0x028a; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x28a; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x21; register_A = flag_C = acc_a0 = 0x0021; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = 0x021; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x02] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x81; register_A = flag_C = acc_a0 = 0x0081; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x081; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (07) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0700; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x67; register_A = flag_C = acc_a0 = 0x0767; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x767; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0af3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1af3; ccpu_ICount -= 2; goto *lab[register_PC];}; L1767: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x72]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0771; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1771; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ L1771: ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = register_A & 0x01 ? 0x0f: 0x07; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (2a) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000a))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (79) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opSUBimm_A_AA (39) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x9) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0784; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1784; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x7b]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = register_A & 0x01 ? 0x0f: 0x07; L1784: ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x20; register_A = flag_C = acc_a0 = 0x0320; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = 0x320; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x58; register_A = flag_C = acc_a0 = 0x0258; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x258; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x21; register_A = flag_C = acc_a0 = 0x0021; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = 0x021; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x02] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x69; register_A = flag_C = acc_a0 = 0x0069; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x069; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (07) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0700; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xa2; register_A = flag_C = acc_a0 = 0x07a2; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x7a2; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0af3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1af3; ccpu_ICount -= 2; goto *lab[register_PC];}; L17a2: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (2a) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000a))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (79) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1d; register_A = flag_C = acc_a0 = 0x001d; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x17aa /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x17ac /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x17ae /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x17b0 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x17b2 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x17b4 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0058; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; ccpu_ICount += 2; /* opJPP8_A_B (50) */ register_PC = 0x0058; /* rom offset */ {register_PC = 0x0058; ccpu_ICount -= 2; goto *lab[register_PC];}; L17b9: ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x6a]; /* set I register */ ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x6c]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x07cb; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x17cb; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x07c5; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x17c5; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x6b]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x6d] = register_A; /* store acc to RAM */ L17c5: ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0b]; /* set I register */ ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xd]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x07cb; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x17cb; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L17cb: ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (02) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0x0200; ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDimmX_B_AA (20) */ cmp_old = register_B; acc_a0 = register_A; /* save old accA bit0 */ cmp_new = 0x76; register_B = flag_C = 0x0276; cmp_new = 0x76; /* No carry */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xda; register_A = flag_C = acc_a0 = 0x02da; ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = 0x07; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x61] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x62] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x60] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1c; register_A = flag_C = acc_a0 = 0x001c; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x17e0 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x17e2 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x17e4 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x17e6 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x17e8 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x17ea /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xbc; register_A = flag_C = acc_a0 = 0x02bc; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = 0x2bc; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x8a; register_A = flag_C = acc_a0 = 0x028a; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x28a; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x21; register_A = flag_C = acc_a0 = 0x0021; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = 0x021; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x03; register_A = flag_C = acc_a0 = 0x0803; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x803; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x0c; register_A = flag_C = acc_a0 = 0x080f; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x80f; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0af3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1af3; ccpu_ICount -= 2; goto *lab[register_PC];}; L180f: ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xf8; register_A = flag_C = acc_a0 = 0x02f8; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = 0x2f8; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x58; register_A = flag_C = acc_a0 = 0x0258; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x258; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x07; register_A = flag_C = acc_a0 = 0x0007; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = 0x007; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x02] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x6c; register_A = flag_C = acc_a0 = 0x006c; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x06c; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x2d; register_A = flag_C = acc_a0 = 0x082d; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x82d; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0af3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1af3; ccpu_ICount -= 2; goto *lab[register_PC];}; L182d: ccpu_ICount += 1; /* opLDAimm_A_AA (03) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0300; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x10; register_A = flag_C = acc_a0 = 0x0310; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = 0x310; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x58; register_A = flag_C = acc_a0 = 0x0258; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x258; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x07; register_A = flag_C = acc_a0 = 0x0007; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = 0x007; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x02] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x6d; register_A = flag_C = acc_a0 = 0x006d; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x06d; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x4b; register_A = flag_C = acc_a0 = 0x084b; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x84b; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0af3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1af3; ccpu_ICount -= 2; goto *lab[register_PC];}; L184b: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x89]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x095c; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x195c; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = 0x07; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x7a] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opAWDirg_A_AA (f7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x90; register_A = flag_C = acc_a0 = 0x0190; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = 0x190; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x32; register_A = flag_C = acc_a0 = 0x0032; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x032; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x4d; register_A = flag_C = acc_a0 = 0x004d; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = 0x04d; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x6f; register_A = flag_C = acc_a0 = 0x086f; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x86f; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x09; register_A = flag_C = acc_a0 = 0x0878; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x878; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0af3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1af3; ccpu_ICount -= 2; goto *lab[register_PC];}; L1878: ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x89]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = 0x8c] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opSUBimm_A_AA (39) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x9) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0882; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1882; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (29) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0009))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L1882: ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x58; register_A = flag_C = acc_a0 = 0x0258; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = 0x258; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x32; register_A = flag_C = acc_a0 = 0x0032; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x032; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x0b; register_A = flag_C = acc_a0 = 0x000b; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = 0x00b; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x02] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x8c; register_A = flag_C = acc_a0 = 0x008c; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x08c; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xa0; register_A = flag_C = acc_a0 = 0x08a0; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x8a0; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0af3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1af3; ccpu_ICount -= 2; goto *lab[register_PC];}; L18a0: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1e; register_A = flag_C = acc_a0 = 0x001e; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x18a3 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x18a5 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x18a7 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x18a9 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18ab /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18ad /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1a; register_A = flag_C = acc_a0 = 0x001a; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x18b1 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x18b3 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x18b5 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x18b7 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18b9 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18bb /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x14; register_A = flag_C = acc_a0 = 0x0014; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x18bf /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x18c1 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x18c3 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x18c5 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18c7 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18c9 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x16; register_A = flag_C = acc_a0 = 0x0016; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x18cd /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x18cf /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x18d1 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x18d3 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18d5 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18d7 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x18; register_A = flag_C = acc_a0 = 0x0018; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x18db /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x18dd /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x18df /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x18e1 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18e3 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18e5 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (ab) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x7b]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (28) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0008))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = register_A & 0x01 ? 0x0f: 0x07; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0012))) & 0xFFF; /* add values */ ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x18f3 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x18f5 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x18f7 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x18f9 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18fb /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x18fd /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 2; /* opAWDirg_A_AA (f7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x90; register_A = flag_C = acc_a0 = 0x0190; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x03] = 0x190; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (01) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0100; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x90; register_A = flag_C = acc_a0 = 0x0190; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x04] = 0x190; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x2c; register_A = flag_C = acc_a0 = 0x002c; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x0e] = 0x02c; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x0f] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (09) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0900; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x17; register_A = flag_C = acc_a0 = 0x0917; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x05] = 0x917; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x0c; register_A = flag_C = acc_a0 = 0x0923; ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x923; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0af3; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1af3; ccpu_ICount -= 2; goto *lab[register_PC];}; L1923: ccpu_ICount += 1; /* opINP_A_AA (17) */ register_PC = 0x1923 /* Force consistency */; cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = get_io_bit(0x7); ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x09c3; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x19c3; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a9) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x89]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x12; register_A = flag_C = acc_a0 = 0x0012; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x192f /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x1931 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x1933 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x1935 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1937 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1939 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x2a] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = 0x2b] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x7a] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x7d] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x6a] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = 0x6b] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x30] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x40] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x50] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = 0x7b] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x80] = 0x000; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x82]; /* set I register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x81] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (2a) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000a))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x69] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (88) */ register_P = 0x8; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x8a]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0058; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; ccpu_ICount += 2; /* opJPP8_A_B (50) */ register_PC = 0x0058; /* rom offset */ {register_PC = 0x0058; ccpu_ICount -= 2; goto *lab[register_PC];}; L195c: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x12; register_A = flag_C = acc_a0 = 0x0012; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x195f /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x1961 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x1963 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x1965 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1967 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1969 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x7d]; /* set I register */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x09c3; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x19c3; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (96) */ vgColour = register_A & 0x01 ? 0x0f: 0x07; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x19] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x10] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x11] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = 0x1c] = 0x000; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xff; register_A = flag_C = acc_a0 = 0x00ff; ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x1d] = 0x0ff; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (22) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0002))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x7d]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x09b2; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x19b2; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (ac) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x7c]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (33) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x3) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x1e] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (09) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0900; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x8f; register_A = flag_C = acc_a0 = 0x098f; ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x1f] = 0x98f; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0575; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1575; ccpu_ICount -= 2; goto *lab[register_PC];}; L198f: ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (be) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x7e]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0998; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1998; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x7d] = register_A; /* store acc to RAM */ L1998: ccpu_ICount += 3; /* opLDAdir_A_AA (ae) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0e]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (3b) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0xb) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x12] = register_A; /* store acc to RAM */ L199d: ccpu_ICount += 1; /* opLDAimm_A_AA (09) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0900; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xc3; register_A = flag_C = acc_a0 = 0x09c3; ccpu_ICount += 1; /* opLDPimm_A_A (80) */ register_P = 0x0; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x00] = 0x9c3; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 1; /* opLDAimm_B_AA (03) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* step back cmp flag */ register_B = cmp_new = 0x0300; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDimmX_B_AA (20) */ cmp_old = register_B; acc_a0 = register_A; /* save old accA bit0 */ register_B = (flag_C = (register_B + (cmp_new = 0x32))) & 0xFFF; /* add values */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x32) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x09ad; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 3; /* opLDJimm_A_A (47) */ register_J = 0x09c7; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x19c7; ccpu_ICount -= 2; goto *lab[register_PC];}; L19b2: ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (ae) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0e]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x12] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (ac) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x7c]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x1e] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (09) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0900; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x9d; register_A = flag_C = acc_a0 = 0x099d; ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x1f] = 0x99d; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0575; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1575; ccpu_ICount -= 2; goto *lab[register_PC];}; L19c3: ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0058; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; ccpu_ICount += 2; /* opJPP8_A_B (50) */ register_PC = 0x0058; /* rom offset */ {register_PC = 0x0058; ccpu_ICount -= 2; goto *lab[register_PC];}; L19c7: ccpu_ICount += 1; /* opLDAimm_A_AA (0a) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0a00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1b; register_A = flag_C = acc_a0 = 0x0a1b; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x16] = 0xa1b; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1a; register_A = flag_C = acc_a0 = 0x0a35; ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x17] = 0xa35; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (09) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0900; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xd7; register_A = flag_C = acc_a0 = 0x09d7; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x2f] = 0x9d7; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0128; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1128; ccpu_ICount -= 2; goto *lab[register_PC];}; L19d7: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x7f; register_A = flag_C = acc_a0 = 0x007f; ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x7c]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x20) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x09eb; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x19eb; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x60; register_A = flag_C = acc_a0 = 0x0060; ccpu_ICount += 3; /* opCMPdir_A_AA (bc) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x7c]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x19eb; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x047d; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x147d; ccpu_ICount -= 2; goto *lab[register_PC];}; L19eb: ccpu_ICount += 1; /* opLDAimm_A_AA (0a) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0a00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x3e; register_A = flag_C = acc_a0 = 0x0a3e; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x16] = 0xa3e; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x32; register_A = flag_C = acc_a0 = 0x0a70; ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x17] = 0xa70; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (09) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0900; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xfb; register_A = flag_C = acc_a0 = 0x09fb; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x2f] = 0x9fb; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0128; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1128; ccpu_ICount -= 2; goto *lab[register_PC];}; L19fb: ccpu_ICount += 1; /* opLDAimm_A_AA (0a) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0a00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x7a; register_A = flag_C = acc_a0 = 0x0a7a; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x16] = 0xa7a; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x32; register_A = flag_C = acc_a0 = 0x0aac; ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x17] = 0xaac; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (0a) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0a00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x0b; register_A = flag_C = acc_a0 = 0x0a0b; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x2f] = 0xa0b; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0128; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1128; ccpu_ICount -= 2; goto *lab[register_PC];}; L1a0b: ccpu_ICount += 1; /* opLDAimm_A_AA (0a) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0a00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xb8; register_A = flag_C = acc_a0 = 0x0ab8; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x16] = 0xab8; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x2f; register_A = flag_C = acc_a0 = 0x0ae7; ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x17] = 0xae7; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (04) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0400; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x7d; register_A = flag_C = acc_a0 = 0x047d; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = 0x2f] = 0x47d; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0128; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1128; ccpu_ICount -= 2; goto *lab[register_PC];}; L1af3: ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* set I register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a4) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x04]; /* new acc value */ ccpu_ICount += 3; /* opLDJimm_A_A (46) */ register_J = 0x0af6; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opSUBdir_A_AA (7e) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0xe]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ L1afd: ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x0afd; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1afd; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0018))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = (register_P << 4) + 0x6] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xff; register_A = flag_C = acc_a0 = 0x00ff; ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = (register_P << 4) + 0x1] = 0x0ff; /* store acc to RAM */ L1b09: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opCMPdir_A_AA (bf) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xf]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0b21; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1b21; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x1b11 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ L1b13: ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = (register_P << 4) + 0x7] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opCMPdir_A_AA (b1) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x1]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x0b6b; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1b6b; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x40) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x0b6e; ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1b6e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0039))) & 0xFFF; /* add values */ ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = (register_P << 4) + 0x7] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1b6e; ccpu_ICount -= 2; goto *lab[register_PC];}; L1b21: ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x02]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x0b6b; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1b6b; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDIdir_A_A (c5) */ register_I = ram[(register_P << 4) + 0x05] & 0xFF; /* set/mask new register_I */ ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = (register_P << 4) + 0x7] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (af) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0f]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0b63; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1b63; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x0b3c; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1b3c; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x0b3d; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1b3d; ccpu_ICount -= 2; goto *lab[register_PC];}; L1b3c: ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ L1b3d: ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L1b42: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (2f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000f))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDAdir_A_AA (ae) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0e]; /* set I register */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0b52; ccpu_ICount += 2; /* opJA0_A_A (5e) */ if (acc_a0 & 0x01) {register_PC = 0x1b52; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opCMPdir_A_AA (b7) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x7]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0b58; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1b58; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = (register_P << 4) + 0xe] = register_A; /* store acc to RAM */ L1b52: ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x0030))) & 0xFFF; /* add values */ ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0b13; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1b13; ccpu_ICount -= 2; goto *lab[register_PC];}; L1b58: ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x02]; /* set I register */ ccpu_ICount += 1; /* opSUBimm_A_AA (31) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (((cmp_new = 0x1) ^ 0xFFF) + 1))) & 0xFFF; /* 1's-comp add */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0b52; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1b52; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x5b; register_A = flag_C = acc_a0 = 0x005b; ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0b13; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1b13; ccpu_ICount -= 2; goto *lab[register_PC];}; L1b63: ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (df) */ ram[register_I = (register_P << 4) + 0xf] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a5) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x05]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opLDJimm_A_A (42) */ register_J = 0x0b42; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1b42; ccpu_ICount -= 2; goto *lab[register_PC];}; L1b6b: ccpu_ICount += 3; /* opCMPdir_A_AA (b0) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x0]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opLDJirg_A_A (e1) */ register_PC = 0x1b6c /* Force consistency */; /* load J reg from value at last dir addr */ register_J = ram[register_I] & 0xFFF; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = (register_PC & 0xF000) | register_J; ccpu_ICount -= 2; goto *lab[register_PC];}; L1b6e: ccpu_ICount += 1; /* opLDAimm_A_AA (0c) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0c00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x29; register_A = flag_C = acc_a0 = 0x0c29; ccpu_ICount += 3; /* opADDdir_A_AA (67) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x7]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x1b72 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (0b) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0b00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xef; register_A = flag_C = acc_a0 = 0x0bef; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L1b7a: ccpu_ICount += 3; /* opLDAdir_A_AA (a7) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x07]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x1b7d /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opCMPdir_A_AA (b1) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x1]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0bc1; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1bc1; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = (register_P << 4) + 0xd] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAdir_A_A (dc) */ ram[register_I = (register_P << 4) + 0xc] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (0b) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0b00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xd2; register_A = flag_C = acc_a0 = 0x0bd2; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x1b90 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opADDdir_A_AA (64) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x4]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = (register_P << 4) + 0x9] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (ac) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0c]; /* set I register */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x1b95 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x3]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = (register_P << 4) + 0x8] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a9) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* new acc value */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x0b9b; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (2f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000f))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opCMPdir_A_AA (bd) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0xd]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (0b) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0b00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xd2; register_A = flag_C = acc_a0 = 0x0bd2; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x1bab /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opADDdir_A_AA (64) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x4]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opSUBdir_A_AA (79) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x9]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (db) */ ram[register_I = (register_P << 4) + 0xb] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (ad) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0d]; /* set I register */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x1bb1 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x3]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 3; /* opSUBdir_A_AA (78) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = (register_P << 4) + 0x8]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = (register_P << 4) + 0xa] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0a]; /* set I register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (ab) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x0b]; /* new acc value */ ccpu_ICount += 0; /* opLLT_A_AA (e4) */ {CINEBYTE temp_byte = 0; for (;;) { if ( (((register_A >> 8) & 0x0A) && (((register_A >> 8) & 0x0A) ^ 0x0A)) || (((register_B >> 8) & 0x0A) && (((register_B >> 8) & 0x0A) ^ 0x0A)) ) break; register_A <<= 1; register_B <<= 1; if (!(++temp_byte)) break /* This may not be correct */; } vgShiftLength = temp_byte & 0xfff; register_A &= 0x0FFF; register_B &= 0x0FFF; } ccpu_ICount += 3; /* opADDdir_A_AA (68) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x8]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opADDdir_B_AA (69) */ acc_a0 = register_A; /* store old acc value */ register_B = (flag_C = ((cmp_old = register_B) + (cmp_new = ram[register_I = (register_P << 4) + 0x09]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 1; /* opVDR_A_A (e0) */ register_PC = 0x1bbd /* Force consistency */; { /* set ending points and draw the vector, or buffer for a later draw. */ int ToX = register_A & 0xFFF; int ToY = register_B & 0xFFF; /* Sign extend from 20 bit CCPU to 32bit target machine */ FromX = SEX(FromX); ToX = SEX(ToX); FromY = SEX(FromY); ToY = SEX(ToY); /* figure out the vector */ ToX -= FromX; ToX = ((signed short int)(((signed short int)ToX) >> (signed short int)vgShiftLength)) /* SAR */; ToX += FromX; ToY -= FromY; ToY = ((signed short int)(((signed short int)ToY) >> (signed short int)vgShiftLength)) /* SAR */; ToY += FromY; /* render the line */ #ifndef DUALCPU CinemaVectorData (FromX, FromY, ToX, ToY, vgColour); #endif } ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x0b7a; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1b7a; ccpu_ICount -= 2; goto *lab[register_PC];}; L1bc1: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (29) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0009))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 3; /* opADDdir_A_AA (64) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x4]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = (register_P << 4) + 0x9] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (a6) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x06]; /* set I register */ ccpu_ICount += 3; /* opADDdir_A_AA (63) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = (register_P << 4) + 0x3]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opADDimm_A_AA (23) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0003))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a9) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x09]; /* new acc value */ ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x0bcb; ccpu_ICount += 2; /* opJDR_A_A (5a) */ ccpu_ICount += 1; /* opVIN_A_A (f0) */ FromX = register_A & 0xFFF; /* regA goes to x-coord */ FromY = register_B & 0xFFF; /* regB goes to y-coord */ ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0b09; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1b09; ccpu_ICount -= 2; goto *lab[register_PC];}; L1d70: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1a; register_A = flag_C = acc_a0 = 0x001a; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x1d73 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x1d75 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x1d77 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x1d79 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1d7b /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1d7d /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x14; register_A = flag_C = acc_a0 = 0x0014; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x1d81 /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x1d83 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x1d85 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x1d87 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1d89 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1d8b /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x1c; register_A = flag_C = acc_a0 = 0x001c; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x1d8f /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x1d91 /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x1d93 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x1d95 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1d97 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1d99 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x18; register_A = flag_C = acc_a0 = 0x0018; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x1d9d /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(0); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x1d9f /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x1da1 /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x1da3 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1da5 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1da7 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0005; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1005; ccpu_ICount -= 2; goto *lab[register_PC];}; L1dc0: ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (45) */ register_J = 0x0dd5; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1dd5; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x11; register_A = flag_C = acc_a0 = 0x0011; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (93) */ ccpu_ICount += 1; register_PC = 0x1dca /* Force consistency */; /* opOUTsnd_A (93) */ set_sound_data(1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (90) */ ccpu_ICount += 1; register_PC = 0x1dcc /* Force consistency */; /* opOUTsnd_A (90) */ set_sound_addr_A(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (91) */ ccpu_ICount += 1; register_PC = 0x1dce /* Force consistency */; /* opOUTsnd_A (91) */ set_sound_addr_B(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (92) */ ccpu_ICount += 1; register_PC = 0x1dd0 /* Force consistency */; /* opOUTsnd_A (92) */ set_sound_addr_C(register_A&1); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1dd2 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; ccpu_ICount += 1; /* opOUTbi_A_A (94) */ ccpu_ICount += 1; register_PC = 0x1dd4 /* Force consistency */; /* opOUTsnd_A (94) */ if (register_A&1) strobe_sound_on(); else strobe_sound_off(); L1dd5: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x29] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (87) */ register_P = 0x7; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x73] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x37] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x39] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x3d] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x47] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x49] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x4d] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d7) */ ram[register_I = 0x57] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (d9) */ ram[register_I = 0x59] = 0x000; /* store acc to RAM */ ccpu_ICount += 2; /* opSTAdir_A_A (dd) */ ram[register_I = 0x5d] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x33] = 0xf00; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x43] = 0xf00; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d3) */ ram[register_I = 0x53] = 0xf00; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a3) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* new acc value */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 3; /* opADDdir_A_AA (62) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x22]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opAWDirg_B_AA (e7) */ acc_a0 = register_A; cmp_old = register_B; register_B = (flag_C = (register_B + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x23]; /* set I register */ ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d2) */ ram[register_I = (register_P << 4) + 0x2] = register_B; /* set I register and store B to ram */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xff; register_A = flag_C = acc_a0 = 0x00ff; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x23]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x00ff))) & 0xFFF; /* add values */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x58] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x38] = 0x000; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 3; /* opSUBdir_A_AA (78) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + ((cmp_new = ram[register_I = 0x58]) ^ 0xFFF) + 1)) & 0xFFF; /* set regI addr */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d8) */ ram[register_I = 0x48] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (0c) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0c00; ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x4a] = 0xc00; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x5a] = 0xc00; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (da) */ ram[register_I = 0x3a] = 0xc00; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x22]; /* set I register */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x0e9d; ccpu_ICount += 2; /* opJA0_A_A (5e) */ if (acc_a0 & 0x01) {register_PC = 0x1e9d; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 2; /* opJA0_A_A (5e) */ if (acc_a0 & 0x01) {register_PC = 0x1e9d; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x23]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 3; /* opLDJimm_A_A (4b) */ register_J = 0x0e5b; ccpu_ICount += 2; /* opJA0_A_A (5e) */ if (acc_a0 & 0x01) {register_PC = 0x1e5b; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x32] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x7f) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x42] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x00fe))) & 0xFFF; /* add values */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x52] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x55] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x45] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x35] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (08) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0800; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b3) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x23]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0e88; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1e88; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (09) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0900; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x31] = 0x900; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xff; register_A = flag_C = acc_a0 = 0x09ff; ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x41] = 0x9ff; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x51] = 0x9ff; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x20; register_A = flag_C = acc_a0 = 0x0020; ccpu_ICount += 3; /* opLDJimm_A_A (44) */ register_J = 0x0e94; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1e94; ccpu_ICount -= 2; goto *lab[register_PC];}; L1e5b: ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x31] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x7f) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x41] = register_A; /* store acc to RAM */ ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x00fe))) & 0xFFF; /* add values */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x51] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x54] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x44] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x34] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (07) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0700; ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x42] = 0x700; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x52] = 0x700; /* store acc to RAM */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0xff) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x32] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xe0; register_A = flag_C = acc_a0 = 0x0fe0; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x35] = 0xfe0; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x55] = 0xfe0; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x45] = 0xfe0; /* store acc to RAM */ ccpu_ICount += 3; /* opLDJimm_A_A (4a) */ register_J = 0x0e9a; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1e9a; ccpu_ICount -= 2; goto *lab[register_PC];}; L1e88: ccpu_ICount += 1; /* opLDAimm_A_AA (07) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0700; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x31] = 0x700; /* store acc to RAM */ ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0xff) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x41] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x51] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xe0; register_A = flag_C = acc_a0 = 0x0fe0; L1e94: ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x34] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x44] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x54] = register_A; /* store acc to RAM */ L1e9a: ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0ef8; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1ef8; ccpu_ICount -= 2; goto *lab[register_PC];}; L1e9d: ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x23]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x42] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x45] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (09) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0900; ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x41] = 0x900; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x18; register_A = flag_C = acc_a0 = 0x0018; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x44] = 0x018; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (07) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0700; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x32] = 0x700; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x51] = 0x700; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (0f) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0f00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xe8; register_A = flag_C = acc_a0 = 0x0fe8; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x54] = 0xfe8; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x35] = 0xfe8; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a2) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x22]; /* set I register */ ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d1) */ ram[register_I = 0x31] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x34] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 3; /* opLDAdir_B_AA (a3) */ flag_C = acc_a0 = register_A; cmp_old = register_B; /* store old acc */ register_B = cmp_new = ram[register_I = (register_P << 4) + 0x03]; /* new acc value */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 3; /* opADDdir_A_AA (62) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x22]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opAWDirg_B_AA (e7) */ acc_a0 = register_A; cmp_old = register_B; register_B = (flag_C = (register_B + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x23]; /* set I register */ ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opSTAdir_B_BB (d2) */ ram[register_I = (register_P << 4) + 0x2] = register_B; /* set I register and store B to ram */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x23]; /* set I register */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d2) */ ram[register_I = 0x52] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 1; /* opASRe_A_AA (ed) */ cmp_new = 0xDED; cmp_old = flag_C = acc_a0 = register_A; register_A = SEX(register_A); /* make signed */ register_A = (((signed short int)(((signed short int)register_A) >> (signed short int)1)) /* SAR */) & 0xFFF; ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = 0x55] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 2; /* opSUBirg_A_AA (e8) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + ((cmp_new = ram[register_I]) ^ 0xFFF) + 1)) & 0xFFF; /* ones compliment */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L1ef8: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x20; register_A = flag_C = acc_a0 = 0x0020; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x2e] = 0x020; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (ba) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x6a]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (48) */ register_J = 0x0f48; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1f48; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (02) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0200; ccpu_ICount += 3; /* opCMPdir_A_AA (ba) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x6a]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (4e) */ register_J = 0x0f3e; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1f3e; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 3; /* opCMPdir_A_AA (ba) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x6a]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (40) */ register_J = 0x0f30; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1f30; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (06) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0600; ccpu_ICount += 3; /* opCMPdir_A_AA (ba) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x6a]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0f21; ccpu_ICount += 2; /* opJLT_A_A (5b) */ if ((cmp_new&0xfff) < (cmp_old&0xfff)) {register_PC = 0x1f21; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x3c; register_A = flag_C = acc_a0 = 0x003c; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x2e] = 0x03c; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x6a]; /* set I register */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x60) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0f41; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1f41; ccpu_ICount -= 2; goto *lab[register_PC];}; L1f21: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x38; register_A = flag_C = acc_a0 = 0x0038; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x2e] = 0x038; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x6a]; /* set I register */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0f41; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1f41; ccpu_ICount -= 2; goto *lab[register_PC];}; L1f30: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x30; register_A = flag_C = acc_a0 = 0x0030; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x2e] = 0x030; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x6a]; /* set I register */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opSUBimmX_A_AA (30) */ cmp_old = acc_a0 = register_A; /* back up regA */ register_A = (flag_C = (register_A + (((cmp_new = 0x80) ^ 0xFFF) + 1))) & 0xFFF; /* add */ ccpu_ICount += 3; /* opLDJimm_A_A (41) */ register_J = 0x0f41; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1f41; ccpu_ICount -= 2; goto *lab[register_PC];}; L1f3e: ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (aa) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x6a]; /* set I register */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; L1f41: ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x2e]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ L1f48: ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (a3) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x23]; /* set I register */ ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opLDJimm_A_A (4c) */ register_J = 0x0f6c; ccpu_ICount += 2; /* opJA0_A_A (5e) */ if (acc_a0 & 0x01) {register_PC = 0x1f6c; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opLDJimm_A_A (4f) */ register_J = 0x0f5f; ccpu_ICount += 2; /* opJA0_A_A (5e) */ if (acc_a0 & 0x01) {register_PC = 0x1f5f; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x23; register_A = flag_C = acc_a0 = 0x0023; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = 0x24] = 0x023; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (ae) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x2e]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (2c) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000c))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (05) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0500; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x39; register_A = flag_C = acc_a0 = 0x0539; ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0f83; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1f83; ccpu_ICount -= 2; goto *lab[register_PC];}; L1f5f: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x17; register_A = flag_C = acc_a0 = 0x0017; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = (register_P << 4) + 0x4] = 0x017; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (ae) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0e]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (28) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0008))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (05) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0500; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x03; register_A = flag_C = acc_a0 = 0x0503; ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0f83; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1f83; ccpu_ICount -= 2; goto *lab[register_PC];}; L1f6c: ccpu_ICount += 1; /* opLSRe_A_AA (eb) */ cmp_new = 0x0BEB; cmp_old = acc_a0 = register_A; flag_C = (0x0BEB + register_A); register_A >>= 1; ccpu_ICount += 3; /* opLDJimm_A_A (4d) */ register_J = 0x0f7d; ccpu_ICount += 2; /* opJA0_A_A (5e) */ if (acc_a0 & 0x01) {register_PC = 0x1f7d; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x11; register_A = flag_C = acc_a0 = 0x0011; ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = (register_P << 4) + 0x4] = 0x011; /* store acc to RAM */ ccpu_ICount += 3; /* opLDAdir_A_AA (ae) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0e]; /* set I register */ ccpu_ICount += 1; /* opADDimm_A_AA (24) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0004))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (04) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0400; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0xc7; register_A = flag_C = acc_a0 = 0x04c7; ccpu_ICount += 3; /* opLDJimm_A_A (43) */ register_J = 0x0f83; ccpu_ICount += 2; /* opJMP_A_A (58) */ {register_PC = 0x1f83; ccpu_ICount -= 2; goto *lab[register_PC];}; L1f7d: ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (27) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0007))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (d4) */ ram[register_I = (register_P << 4) + 0x4] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (04) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0400; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x81; register_A = flag_C = acc_a0 = 0x0481; L1f83: ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x30] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x40] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = 0x50] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b9) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x69]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 3; /* opLDJimm_A_A (49) */ register_J = 0x0f99; ccpu_ICount += 2; if (cmp_new == cmp_old) {register_PC = 0x1f99; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x10; register_A = flag_C = acc_a0 = 0x0010; ccpu_ICount += 1; /* opLDPimm_A_A (86) */ register_P = 0x6; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (ba) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x6a]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; if (!(flag_C & CARRYBIT)) {register_PC = 0x1f99; ccpu_ICount -= 2; goto *lab[register_PC];}; ccpu_ICount += 2; /* opLDAirg_A_AA (ea) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = ram[register_I]; ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opADDimm_A_AA (2f) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x000f))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x2e] = register_A; /* store acc to RAM */ L1f99: ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opLDAdir_A_AA (ae) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = 0x2e]; /* set I register */ ccpu_ICount += 1; /* opLDPimm_A_A (83) */ register_P = 0x3; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x36] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (84) */ register_P = 0x4; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x46] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (85) */ register_P = 0x5; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (d6) */ ram[register_I = 0x56] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (0c) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0x0c00; ccpu_ICount += 3; /* opADDimmX_A_AA (20) */ cmp_old = register_A; cmp_new = 0x7e; register_A = flag_C = acc_a0 = 0x0c7e; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 2; /* opSTAdir_A_A (de) */ ram[register_I = 0x2e] = 0xc7e; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (27) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0007))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (b2) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x22]) ^ 0xFFF) + 1 + register_A); ccpu_ICount += 2; /* opANDirg_A_AA (e9) */ cmp_old = flag_C = acc_a0 = register_A; register_A &= (cmp_new = ram[register_I]); ccpu_ICount += 1; /* opLSLe_A_AA (ec) */ cmp_new = 0x0CEC; cmp_old = acc_a0 = register_A; flag_C = (0x0CEC + register_A); register_A = (register_A << 1) & 0x0FFF; ccpu_ICount += 1; /* opLDPimm_A_A (82) */ register_P = 0x2; /* set page register */ ccpu_ICount += 3; /* opADDdir_A_AA (6e) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = ram[register_I = 0x2e]))) & 0xFFF; /* do acc operation */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opADDimm_A_AA (21) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x1fb0 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_A; /* store acc to RAM */ ccpu_ICount += 2; /* opNOP_A_B (57) */ ccpu_ICount += 2; /* opLDAirg_B_AA (ea) */ flag_C = acc_a0 = register_A; cmp_old = register_B; register_B = cmp_new = ram[register_I]; ccpu_ICount += 3; /* opLDAdir_A_AA (ae) */ cmp_old = flag_C = acc_a0 = register_A; /* store old acc */ register_A = cmp_new = ram[register_I = (register_P << 4) + 0x0e]; /* set I register */ ccpu_ICount += 7; /* opXLT_A_AA (e2) */ register_PC = 0x1fb6 /* Force consistency */; cmp_old = register_A; register_A = cmp_new = rom[0x1000 | register_A]; /* new acc value */ ccpu_ICount += 2; /* opNOP_A_A (5f) */ ccpu_ICount += 2; /* opSTAirg_A_A (e6) */ ram[register_I] = register_A; /* store acc */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 1; /* opASRDe_A_AA (ee) */ cmp_new = 0x0EEE; cmp_old = acc_a0 = register_A; flag_C = (0x0EEE + register_A); register_A = (register_A >> 1) | ((register_B & 1) << 11); register_B = (register_B >> 1) | (register_B & 0x800); ccpu_ICount += 2; /* opAWDirg_A_AA (e7) */ cmp_old = acc_a0 = register_A; register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; set_watchdog(); ccpu_ICount += 2; /* opSTAdir_A_A (d5) */ ram[register_I = (register_P << 4) + 0x5] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDAimm_A_AA (00) */ cmp_old = flag_C = acc_a0 = register_A; register_A = cmp_new = 0; ccpu_ICount += 1; /* opADDimm_A_AA (27) */ register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0007))) & 0xFFF; /* add values, save carry */ ccpu_ICount += 2; /* opSTAdir_A_A (d0) */ ram[register_I = (register_P << 4) + 0x0] = register_A; /* store acc to RAM */ ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 3; /* opCMPdir_A_AA (bf) */ cmp_old = acc_a0 = register_A; /* backup old acc */ flag_C = (((cmp_new = ram[register_I = 0x1f]) ^ 0xFFF) + 1 + register_A); L1fc5: ccpu_ICount += 2; /* opLDJirg_A_A (e1) */ register_PC = 0x1fc5 /* Force consistency */; /* load J reg from value at last dir addr */ register_J = ram[register_I] & 0xFFF; ccpu_ICount += 1; /* opLDPimm_A_A (81) */ register_P = 0x1; /* set page register */ ccpu_ICount += 2; ccpu_ICount += 2; /* opJPP8_A_B (50) */ register_PC = register_J + 0x0000; /* rom offset */ /* WARNING: UNKNOWN JUMP DESTINATION - MAY FOUL UP CODE OPTIMISATIONS */ {register_PC = (register_PC & 0xF000) | register_J; ccpu_ICount -= 2; goto *lab[register_PC];};