case 0x0000: register_B = 0; 00000064: 426E FDF6 clr.w -522(a6) cmp_old = flag_C = acc_a0 = register_A; 00000068: 3D43 FDFC move.w d3,-516(a6) 0000006C: 3A03 move.w d3,d5 0000006E: 3C03 move.w d3,d6 register_A = cmp_new = 0x0f00; 00000070: 3E3C 0F00 move.w #3840,d7 00000074: 3607 move.w d7,d3 cmp_old = register_A; 00000076: 3C03 move.w d3,d6 cmp_new = 0x01; 00000078: 7E01 moveq #1,d7 register_A = flag_C = acc_a0 = 0x0f01; 0000007A: 3D7C 0F01 FDFC move.w #3841,-516(a6) 00000080: 3A3C 0F01 move.w #3841,d5 00000084: 3605 move.w d5,d3 register_J = 0x0008; /* load page register from immediate */ 00000086: 3D7C 0008 FDF8 move.w #8,-520(a6) register_P = 0x0000; /* set page register */ case 0x0008: 0000008C: 426E FDFA clr.w -518(a6) ram[register_I = (register_P << 4) + 0x0] = register_A; /* store acc to RAM */ /* load regI directly .. */ 00000090: 302E FDFA move.w -518(a6),d0 00000094: E948 lsl.w #4,d0 00000096: 3800 move.w d0,d4 00000098: 7200 moveq #0,d1 0000009A: 3200 move.w d0,d1 0000009C: D281 add.l d1,d1 0000009E: 41EE FE00 lea -512(a6),a0 000000A2: 3183 1800 move.w d3,(a0,d1.l) register_I = ram[(register_P << 4) + 0x00] & 0xFF; /* set/mask new register_I */ 000000A6: 302E FDFA move.w -518(a6),d0 000000AA: E948 lsl.w #4,d0 000000AC: 7800 moveq #0,d4 000000AE: 3800 move.w d0,d4 000000B0: D884 add.l d4,d4 000000B2: 3830 4800 move.w (a0,d4.l),d4 000000B6: 0244 00FF andi.w #0xff,d4 ram[register_I] = register_B; /* store acc */ 000000BA: 7000 moveq #0,d0 000000BC: 3004 move.w d4,d0 000000BE: D080 add.l d0,d0 000000C0: 31AE FDF6 0800 move.w -522(a6),(a0,d0.l) register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ /* opJNC_A_A (5d) */ 000000C6: 3D43 FDFC move.w d3,-516(a6) 000000CA: 3C03 move.w d3,d6 000000CC: 7E01 moveq #1,d7 000000CE: 3007 move.w d7,d0 000000D0: D043 add.w d3,d0 000000D2: 3A00 move.w d0,d5 000000D4: 0240 0FFF andi.w #0xfff,d0 000000D8: 3600 move.w d0,d3 if (!(flag_C & CARRYBIT)) { 000000DA: 0805 000C btst #12,d5 000000DE: 660A bne.s *+12 ; 0x000000ea register_PC = 0x0008 /* JMP() */; /* no carry, so jump */ 000000E0: 3D7C 0008 FDFE move.w #8,-514(a6) break; 000000E6: 6000 FF58 bra.w *-166 ; 0x00000040 } ram[register_I = (register_P << 4) + 0x0] = register_A; /* store acc to RAM */ 000000EA: 302E FDFA move.w -518(a6),d0 000000EE: E948 lsl.w #4,d0 000000F0: 3800 move.w d0,d4 000000F2: 7200 moveq #0,d1 000000F4: 3200 move.w d0,d1 000000F6: D281 add.l d1,d1 000000F8: 41EE FE00 lea -512(a6),a0 000000FC: 3183 1800 move.w d3,(a0,d1.l) register_A = 0; 00000100: 7600 moveq #0,d3 register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ 00000102: 3D43 FDFC move.w d3,-516(a6) 00000106: 3C03 move.w d3,d6 00000108: 7E01 moveq #1,d7 0000010A: 3007 move.w d7,d0 0000010C: D043 add.w d3,d0 0000010E: 3A00 move.w d0,d5 00000110: 0240 0FFF andi.w #0xfff,d0 00000114: 3600 move.w d0,d3 register_PC = 0x0011 /* Force consistency */; 00000116: 3D7C 0011 FDFE move.w #17,-514(a6) register_PC = 0x0011 /* Force consistency */; 0000011C: 3D7C 0011 FDFE move.w #17,-514(a6) if (!(register_A & 0x01)) 00000122: 0803 0000 btst #0,d3 00000126: 6624 bne.s *+38 ; 0x0000014c CCPU_WRITEPORT (CCPU_PORT_IOOUTPUTS, (CCPU_READPORT (CCPU_PORT_IOOUTPUTS) | 0x0020)); else 00000128: 3F2E FDFE move.w -514(a6),-(a7) 0000012C: 3F2E FDFE move.w -514(a6),-(a7) 00000130: 3F3C 0002 move.w #2,-(a7) 00000134: 4EAD 0000 jsr xCCPU_READPORT 00000138: 0040 0020 ori.w #0x20,d0 0000013C: 584F addq.w #4,a7 0000013E: 3F00 move.w d0,-(a7) 00000140: 3F3C 0002 move.w #2,-(a7) 00000144: 4EAD 0000 jsr xCCPU_WRITEPORT 00000148: 5C4F addq.w #6,a7 0000014A: 6022 bra.s *+36 ; 0x0000016e CCPU_WRITEPORT (CCPU_PORT_IOOUTPUTS, (CCPU_READPORT (CCPU_PORT_IOOUTPUTS) & ~(0x0020))); /* REQUIRED: reset coin counter */ 0000014C: 3F2E FDFE move.w -514(a6),-(a7) 00000150: 3F2E FDFE move.w -514(a6),-(a7) 00000154: 3F3C 0002 move.w #2,-(a7) 00000158: 4EAD 0000 jsr xCCPU_READPORT 0000015C: 0240 FFDF andi.w #0xffdf,d0 00000160: 584F addq.w #4,a7 00000162: 3F00 move.w d0,-(a7) 00000164: 3F3C 0002 move.w #2,-(a7) 00000168: 4EAD 0000 jsr xCCPU_WRITEPORT 0000016C: 5C4F addq.w #6,a7 register_J = 0x0904; /* * simple jump; change PC and continue.. */ 0000016E: 3D7C 0904 FDF8 move.w #2308,-520(a6) register_PC = 0x0904 /* JMP() */; 00000174: 3D7C 0904 FDFE move.w #2308,-514(a6) break; /* or continue? */ 0000017A: 6000 FEC4 bra.w *-314 ; 0x00000040 case 0x0026: cmp_old = flag_C = acc_a0 = register_A; 0000017E: 3D43 FDFC move.w d3,-516(a6) 00000182: 3A03 move.w d3,d5 00000184: 3C03 move.w d3,d6 register_A = cmp_new = 0x0900; 00000186: 3E3C 0900 move.w #2304,d7 0000018A: 3607 move.w d7,d3 cmp_old = register_A; 0000018C: 3C03 move.w d3,d6 cmp_new = 0x1c; 0000018E: 7E1C moveq #28,d7 register_A = flag_C = acc_a0 = 0x091c; 00000190: 3D7C 091C FDFC move.w #2332,-516(a6) 00000196: 3A3C 091C move.w #2332,d5 0000019A: 3605 move.w d5,d3 cmp_old = acc_a0 = register_A; 0000019C: 3D43 FDFC move.w d3,-516(a6) 000001A0: 3C03 move.w d3,d6 register_A = (flag_C = (register_A + (cmp_new = ram[register_I]))) & 0xFFF; /* opXLT_A_AA (e2) */ /* * XLT is weird; it loads the current accumulator with the bytevalue * at ROM location pointed to by the accumulator; this allows the * program to read the program itself.. * NOTE! Next opcode is *IGNORED!* because of a twisted side-effect */ 000001A2: 7000 moveq #0,d0 000001A4: 3004 move.w d4,d0 000001A6: D080 add.l d0,d0 000001A8: 41EE FE00 lea -512(a6),a0 000001AC: 3E30 0800 move.w (a0,d0.l),d7 000001B0: 3003 move.w d3,d0 000001B2: D047 add.w d7,d0 000001B4: 3A00 move.w d0,d5 000001B6: 0240 0FFF andi.w #0xfff,d0 000001BA: 3600 move.w d0,d3 register_PC = 0x002a /* Force consistency */; 000001BC: 3D7C 002A FDFE move.w #42,-514(a6) cmp_old = register_A; 000001C2: 3C03 move.w d3,d6 register_A = cmp_new = rom[0x0000 | register_A]; /* new acc value */ /* Would jump over next instruction, but it's a no-op */ /* * STA into address specified in regI. Nice and easy :) */ 000001C4: 7000 moveq #0,d0 000001C6: 3003 move.w d3,d0 000001C8: 41EE DDF6 lea -8714(a6),a0 000001CC: 7200 moveq #0,d1 000001CE: 1230 0800 move.b (a0,d0.l),d1 000001D2: 3E01 move.w d1,d7 000001D4: 3601 move.w d1,d3 ram[register_I] = register_A; /* store acc */ 000001D6: 7000 moveq #0,d0 000001D8: 3004 move.w d4,d0 000001DA: D080 add.l d0,d0 000001DC: 41EE FE00 lea -512(a6),a0 000001E0: 3183 0800 move.w d3,(a0,d0.l) cmp_old = flag_C = acc_a0 = register_A; 000001E4: 3D43 FDFC move.w d3,-516(a6) 000001E8: 3A03 move.w d3,d5 000001EA: 3C03 move.w d3,d6 register_A = cmp_new = 0x0200; 000001EC: 3E3C 0200 move.w #512,d7 000001F0: 3607 move.w d7,d3 cmp_old = register_A; 000001F2: 3C03 move.w d3,d6 cmp_new = 0xd3; 000001F4: 3E3C 00D3 move.w #211,d7 register_A = flag_C = acc_a0 = 0x02d3; /* load page register from immediate */ 000001F8: 3D7C 02D3 FDFC move.w #723,-516(a6) 000001FE: 3A3C 02D3 move.w #723,d5 00000202: 3605 move.w d5,d3 register_P = 0x0008; /* set page register */ 00000204: 3D7C 0008 FDFA move.w #8,-518(a6) ram[register_I = 0x83] = 0x2d3; /* store acc to RAM */ /* load page register from immediate */ 0000020A: 383C 0083 move.w #131,d4 0000020E: 7000 moveq #0,d0 00000210: 3004 move.w d4,d0 00000212: D080 add.l d0,d0 00000214: 31BC 02D3 0800 move.w #723,(a0,d0.l) register_P = 0x0002; /* set page register */ 0000021A: 3D7C 0002 FDFA move.w #2,-518(a6) ram[register_I = 0x22] = 0x2d3; /* store acc to RAM */ 00000220: 7822 moveq #34,d4 00000222: 7000 moveq #0,d0 00000224: 3004 move.w d4,d0 00000226: D080 add.l d0,d0 00000228: 31BC 02D3 0800 move.w #723,(a0,d0.l) ram[register_I = 0x23] = 0x2d3; /* store acc to RAM */ 0000022E: 7823 moveq #35,d4 00000230: 7000 moveq #0,d0 00000232: 3004 move.w d4,d0 00000234: D080 add.l d0,d0 00000236: 31BC 02D3 0800 move.w #723,(a0,d0.l) register_A = 0; 0000023C: 7600 moveq #0,d3 ram[register_I = 0x2c] = 0x000; /* store acc to RAM */ 0000023E: 782C moveq #44,d4 00000240: 7000 moveq #0,d0 00000242: 3004 move.w d4,d0 00000244: D080 add.l d0,d0 00000246: 4270 0800 clr.w (a0,d0.l) ram[register_I = 0x2d] = 0x000; /* store acc to RAM */ register_A = 0; /* load page register from immediate */ 0000024A: 782D moveq #45,d4 0000024C: 7000 moveq #0,d0 0000024E: 3004 move.w d4,d0 00000250: D080 add.l d0,d0 00000252: 4270 0800 clr.w (a0,d0.l) register_P = 0x0006; /* set page register */ 00000256: 3D7C 0006 FDFA move.w #6,-518(a6) ram[register_I = 0x62] = 0x000; /* store acc to RAM */ 0000025C: 7862 moveq #98,d4 0000025E: 7000 moveq #0,d0 00000260: 3004 move.w d4,d0 00000262: D080 add.l d0,d0 00000264: 4270 0800 clr.w (a0,d0.l) ram[register_I = 0x60] = 0x000; /* store acc to RAM */ 00000268: 7860 moveq #96,d4 0000026A: 7000 moveq #0,d0 0000026C: 3004 move.w d4,d0 0000026E: D080 add.l d0,d0 00000270: 4270 0800 clr.w (a0,d0.l) ram[register_I = 0x6a] = 0x000; /* store acc to RAM */ 00000274: 786A moveq #106,d4 00000276: 7000 moveq #0,d0 00000278: 3004 move.w d4,d0 0000027A: D080 add.l d0,d0 0000027C: 4270 0800 clr.w (a0,d0.l) ram[register_I = 0x6c] = 0x000; /* store acc to RAM */ 00000280: 786C moveq #108,d4 00000282: 7000 moveq #0,d0 00000284: 3004 move.w d4,d0 00000286: D080 add.l d0,d0 00000288: 4270 0800 clr.w (a0,d0.l) ram[register_I = 0x69] = 0x000; /* store acc to RAM */ 0000028C: 7869 moveq #105,d4 0000028E: 7000 moveq #0,d0 00000290: 3004 move.w d4,d0 00000292: D080 add.l d0,d0 00000294: 4270 0800 clr.w (a0,d0.l) register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ 00000298: 3D43 FDFC move.w d3,-516(a6) 0000029C: 3C03 move.w d3,d6 0000029E: 7E01 moveq #1,d7 000002A0: 3007 move.w d7,d0 000002A2: D043 add.w d3,d0 000002A4: 3A00 move.w d0,d5 000002A6: 0240 0FFF andi.w #0xfff,d0 000002AA: 3600 move.w d0,d3 ram[register_I = 0x61] = register_A; /* store acc to RAM */ 000002AC: 7861 moveq #97,d4 000002AE: 7000 moveq #0,d0 000002B0: 3004 move.w d4,d0 000002B2: D080 add.l d0,d0 000002B4: 3183 0800 move.w d3,(a0,d0.l) register_PC = 0x0041 /* Force consistency */; 000002B8: 3D7C 0041 FDFE move.w #65,-514(a6) cmp_old = flag_C = acc_a0 = register_A; 000002BE: 3D43 FDFC move.w d3,-516(a6) 000002C2: 3A03 move.w d3,d5 000002C4: 3C03 move.w d3,d6 register_A = cmp_new = ((CCPU_READPORT (CCPU_PORT_IOINPUTS) >> 0x07) & 0x01); 000002C6: 3F2E FDFE move.w -514(a6),-(a7) 000002CA: 3F3C 0001 move.w #1,-(a7) 000002CE: 4EAD 0000 jsr xCCPU_READPORT 000002D2: EE40 asr.w #7,d0 000002D4: 0240 0001 andi.w #0x1,d0 000002D8: 3E00 move.w d0,d7 000002DA: 3600 move.w d0,d3 register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ 000002DC: 3D43 FDFC move.w d3,-516(a6) 000002E0: 3C03 move.w d3,d6 000002E2: 7E01 moveq #1,d7 000002E4: 3007 move.w d7,d0 000002E6: D043 add.w d3,d0 000002E8: 3A00 move.w d0,d5 000002EA: 0240 0FFF andi.w #0xfff,d0 000002EE: 3600 move.w d0,d3 register_J = 0x0058; /* opJEQ_A_A (5c) */ /* jump if equal */ 000002F0: 3D7C 0058 FDF8 move.w #88,-520(a6) if (cmp_new == cmp_old) 000002F6: BE46 cmp.w d6,d7 000002F8: 584F addq.w #4,a7 000002FA: 660A bne.s *+12 ; 0x00000306 {register_PC = 0x0058; 000002FC: 3D7C 0058 FDFE move.w #88,-514(a6) break /* JMP() */;} 00000302: 6000 FD3C bra.w *-706 ; 0x00000040 register_J = 0x0000; /* load page register from immediate */ 00000306: 426E FDF8 clr.w -520(a6) register_P = 0x0002; /* set page register */ /* MSIZE -- 0 = 4k, 1 = 8k, 2 = 16k, 3 = 32k */ /* * "long jump"; combine P and J to jump to a new far location (that can * be more than 12 bits in address). After this jump, further jumps * are local to this new page. */ 0000030A: 3D7C 0002 FDFA move.w #2,-518(a6) register_PC = 0x1000; /* rom offset */ 00000310: 3D7C 1000 FDFE move.w #4096,-514(a6) break; /* WARNING: this code tags the next instruction as type B but in fact it's the jump dest that should be B */ 00000316: 6000 FD28 bra.w *-726 ; 0x00000040 case 0x004a: register_A = (flag_C = ((acc_a0 = cmp_old = register_A) + (cmp_new = 0x001f))) & 0xFFF; /* add values */ /* * compare direct mode; don't modify regs, just set carry flag or not. */ 0000031A: 3C03 move.w d3,d6 0000031C: 3D43 FDFC move.w d3,-516(a6) 00000320: 7E1F moveq #31,d7 00000322: 3007 move.w d7,d0 00000324: D043 add.w d3,d0 00000326: 3A00 move.w d0,d5 00000328: 0240 0FFF andi.w #0xfff,d0 0000032C: 3600 move.w d0,d3 cmp_old = acc_a0 = register_A; /* backup old acc */ 0000032E: 3D43 FDFC move.w d3,-516(a6) 00000332: 3C03 move.w d3,d6 flag_C = (((cmp_new = ram[register_I = (register_P << 4) + 0x3]) ^ 0xFFF) + 1 + register_A); 00000334: 3A2E FDFA move.w -518(a6),d5 00000338: E94D lsl.w #4,d5 0000033A: 5645 addq.w #3,d5 0000033C: 3805 move.w d5,d4 0000033E: 7200 moveq #0,d1 00000340: 3205 move.w d5,d1 00000342: D281 add.l d1,d1 00000344: 41EE FE00 lea -512(a6),a0 00000348: 3E30 1800 move.w (a0,d1.l),d7 0000034C: 3A07 move.w d7,d5 0000034E: 0A45 0FFF eori.w #0xfff,d5 00000352: 5245 addq.w #1,d5 00000354: DA43 add.w d3,d5 register_J = 0x0056; /* opJNC_A_A (5d) */ 00000356: 3D7C 0056 FDF8 move.w #86,-520(a6) if (!(flag_C & CARRYBIT)) { 0000035C: 0805 000C btst #12,d5 00000360: 660A bne.s *+12 ; 0x0000036c register_PC = 0x0056 /* JMP() */; /* no carry, so jump */ 00000362: 3D7C 0056 FDFE move.w #86,-514(a6) break; 00000368: 6000 FCD6 bra.w *-808 ; 0x00000040 } cmp_old = flag_C = acc_a0 = register_A; 0000036C: 3D43 FDFC move.w d3,-516(a6) 00000370: 3A03 move.w d3,d5 00000372: 3C03 move.w d3,d6 register_A = cmp_new = ram[register_I]; 00000374: 7000 moveq #0,d0 00000376: 3004 move.w d4,d0 00000378: D080 add.l d0,d0 0000037A: 41EE FE00 lea -512(a6),a0 0000037E: 3E30 0800 move.w (a0,d0.l),d7 00000382: 3607 move.w d7,d3 register_A = (flag_C = ((cmp_old = acc_a0 = register_A) + (cmp_new = 0x0001))) & 0xFFF; /* add values, save carry */ /* * STA into address specified in regI. Nice and easy :) */ 00000384: 3D43 FDFC move.w d3,-516(a6) 00000388: 3C03 move.w d3,d6 0000038A: 7E01 moveq #1,d7 0000038C: 3007 move.w d7,d0 0000038E: D043 add.w d3,d0 00000390: 3A00 move.w d0,d5 00000392: 0240 0FFF andi.w #0xfff,d0 00000396: 3600 move.w d0,d3 ram[register_I] = register_A; /* store acc */ 00000398: 7000 moveq #0,d0 0000039A: 3004 move.w d4,d0 0000039C: D080 add.l d0,d0 0000039E: 3183 0800 move.w d3,(a0,d0.l)