;           DEC 99999 AAAAAAAAAAAAAAAAAAA
;
vsynch  *  &13
;
poke   ; *** Tim ***  Routine to poke/peek a byte into/form either
;             |       the io processor or the language processor.
;             |       If the byte is destined specifically for the io
;             |       processor, it is poked there straight away.
;             |       Otherwise, if a second processor is detected, the
;             |       tube is claimed, the byte poked and then released.
;             |
;             |       Routine entered with X,Y pointing to 4 byte address
;             |       A = 0 - byte peeked, A = 1 - TTEMP2 poked
;             |
 PHA            ;     |
 STX TTEMP      ;     |  TTEMP is zero-page
 STY TTEMP+1    ;     |
 LDYIM 3        ;     |
 LDAIY TTEMP    ;     |  Read byte 4 of address
 CMPIM &FF      ;     |  If equal to &FF then it could be for io proc.
 BNE poke2      ;     |
 DEY            ;     |
 LDAIY TTEMP    ;     |  Read byte 3 of address
 CMPIM &FF      ;     |
 BNE poke2      ;     |  Branch if not for io proc.
poke3           ;     |
 DEY            ;     |
 LDAIY TTEMP    ;     |  Read MSB
 PHA            ;     |
 DEY            ;     |
 LDAIY TTEMP    ;     |  Read LSB
 STA TTEMP      ;     |
 PLA            ;     |
 STA TTEMP+1    ;     |
 PLA            ;     |  Restore poke/peek flag
 BEQ pokepe     ;     |  Branch if peek
 LDA TTEMP2     ;     |  Read byte to be poked
 STAIY TTEMP    ;     |  Poke byte
 RTS            ;     |
pokepe          ;     |
 LDAIY TTEMP    ;     |  Read byte
 RTS            ;     | 
;                     |
poke2           ;     |
 JSR istube     ;     |  Check for tube presence
 PHP            ;     |
 LDYIM 2        ;     |
 PLP            ;     |
 BEQ poke3      ;     |  Branch if no tube
 JSR claim      ;     |  Claim tube
 PLA            ;     |  Pull poke/peek flag
 PHP            ;     |  Save interrupt status
 PHA            ;     |  Restore direction byte
 SEI            ;     |  Interrupts off
 LDX TTEMP      ;     |  Point X and Y to address address (!)
 LDY TTEMP+1    ;     |
 JSR tube       ;     |  Set up transfer
 PLA            ;     |  Read poke/peek byte
 BEQ loopqq     ;     |  Branch if peek
loop            ;     |
 BIT TR3STA     ;     |
 BVC loop       ;     |  Branch if tube full
 LDA TTEMP2     ;     |  Read back byte to poke
 STA TR3DAT     ;     |  Poke byte (At last !!)
plplpl          ;     |
 JSR letgo      ;     |  Release tube
 PLP            ;     |  Restore interrupt status
 RTS            ;     |
loopqq          ;     |
 BIT TR3STA     ;     |
 BPL loopqq     ;     |  Branch if tube empty
 LDA TR3DAT     ;     |  Peek byte
 PHA            ;     |
 JSR letgo      ;     |
 PLA            ;     |
 PLP            ;     |  Restore interrupt status
 RTS            ;     |
;
claim           ; *** Tim ***   Routine to claim tube
 LDAIM identi :OR: &C0  ;   |  Load in tube id
 JSR tube       ;      |  Attempt to claim tube
 BCC claim      ;      |  Branch if not successful
 RTS            ; *** Tim ***
;
letgo           ; *** Tim ***   Routine to release tube
 LDAIM identi :OR: &80  ;   |  Release tube id
 JSR tube       ;      |
 RTS            ; *** Tim ***
;
istube          ; *** Tim ***   Routine to check for tube presence
 LDAIM &EA      ;      |  OSBYTE code for tube presence
 LDXIM 0        ;      |
 LDYIM 255      ;      |
 JSR osbyte     ;      |  Read tube presence
 CPXIM 0        ;      |  Returns Z=0 => tube present
 RTS            ;      |          Z=1 => no tube