; > $.pkermit.s.rs423
;    (c) D.R.McAuley 1987

ON        * 1
OFF       * 0
OutputToo * OFF

r0      RN 0
r1      RN 1
r2      RN 2
r3      RN 3
r4      RN 4
r5      RN 5
r6      RN 6
r7      RN 7
r8      RN 8
r9      RN 9
r10     RN 10
r11     RN 11
r12     RN 12
r13     RN 13
r14     RN 14
pc      RN 15

C_bit   * &20000000
V_bit   * &10000000

        EXPORT  |rsintercept|
        EXPORT  |rsrelease|

        EXPORT  |kbintercept|
        EXPORT  |kbrelease|

        IMPORT  |_rsinsertinn|
        IMPORT  |_rsremoveinn|
        IMPORT  |_rscountnpinn|
        IMPORT  |_rsinsertout|
        IMPORT  |_rsremoveout|
        IMPORT  |_rscountnpout|

        IMPORT  |_kbinsertinn|
        IMPORT  |_kbremoveinn|
        IMPORT  |_kbcountnpinn|

        AREA    |C$$code|, CODE, READONLY
|v$codesegment|

rsintercept
        SWI     20              ; Disable Interrupts
        MOV     r0, #20
        ADR     r1, vecinsert
        SWI     31              ; Claim vector
        MOV     r0, #21
        ADR     r1, vecremove
        SWI     31              ; Claim vector
        MOV     r0, #22
        ADR     r1, veccountnp
        SWI     31              ; Claim vector
        SWI     19              ; Enable Interrupts
        MOV     pc, r14

rsrelease
        SWI     20              ; Disable Interrupts
        MOV     r0, #20
        ADR     r1, vecinsert
        SWI     32              ; Release vector
        MOV     r0, #21
        ADR     r1, vecremove
        SWI     32              ; Release vector
        MOV     r0, #22
        ADR     r1, veccountnp
        SWI     32              ; Release vector
        SWI     19              ; Enable Interrupts
        MOV     pc, r14



kbintercept
        SWI     20              ; Disable Interrupts
        MOV     r0, #20
        ADR     r1, kbvecinsert
        SWI     31              ; Claim vector
        MOV     r0, #21
        ADR     r1, kbvecremove
        SWI     31              ; Claim vector
        MOV     r0, #22
        ADR     r1, kbveccountnp
        SWI     31              ; Claim vector
        SWI     19              ; Enable Interrupts
        MOV     pc, r14

kbrelease
        SWI     20              ; Disable Interrupts
        MOV     r0, #20
        ADR     r1, kbvecinsert
        SWI     32              ; Release vector
        MOV     r0, #21
        ADR     r1, kbvecremove
        SWI     32              ; Release vector
        MOV     r0, #22
        ADR     r1, kbveccountnp
        SWI     32              ; Release vector
        SWI     19              ; Enable Interrupts
        MOV     pc, r14




vecinsert
        CMP     r1, #1
        [       OutputToo = ON                
        CMPNE   r1, #2
        ]
        MOVNE   pc, r14
        [       OutputToo = ON
        CMP     r1, #1
        BLEQ    |_rsinsertinn|
        BLNE    |_rsinsertout|
        |
        BL      |_rsinsertinn|
        ]
        LDMFD   r13!, {r14}
        BIC     r14, r14, #C_bit
        CMP     r0, #1
        ORREQ   r14, r14, #C_bit
        MOVS    pc, r14

vecremove
        CMP     r1, #1
        [       OutputToo = ON
        CMPNE   r1, #2
        ]
        MOVNE   pc, r14
        AND     r0, r14, #V_bit
        [       OutputToo = ON
        CMP     r1, #1
        BLEQ    |_rsremoveinn|
        BLNE    |_rsremoveout|
        |
        BL      |_rsremoveinn|
        ]
        LDMFD   r13!, {r14}
        BIC     r14, r14, #C_bit
        CMP     r0, #256
        ORRGE   r14, r14, #C_bit
        MOV     r2, r0
        MOVS    pc, r14

veccountnp
        CMP     r1, #1
        [       OutputToo = ON
        CMPNE   r1, #2
        ]
        MOVNE   pc, r14
        [       OutputToo = ON
        CMP     r1, #1
        ]
        AND     r0, r14, #V_bit
        AND     r1, r14, #C_bit
        [       OutputToo = ON
        BLEQ    |_rscountnpinn|
        BLNE    |_rscountnpout|
        |
        BL      |_rscountnpinn|
        ]
        LDMFD   r13!, {pc}

kbvecinsert
        CMP     r1, #0
        MOVNE   pc, r14
        BL      |_kbinsertinn|
        LDMFD   r13!, {r14}
        BIC     r14, r14, #C_bit
        CMP     r0, #1
        ORREQ   r14, r14, #C_bit
        MOVS    pc, r14

kbvecremove
        CMP     r1, #0
        MOVNE   pc, r14
        AND     r0, r14, #V_bit
        BL      |_kbremoveinn|
        LDMFD   r13!, {r14}
        BIC     r14, r14, #C_bit
        CMP     r0, #256
        ORRGE   r14, r14, #C_bit
        MOV     r2, r0
        MOVS    pc, r14

kbveccountnp
        CMP     r1, #0
        MOVNE   pc, r14
        AND     r0, r14, #V_bit
        AND     r1, r14, #C_bit
        BL      |_kbcountnpinn|
        LDMFD   r13!, {pc}


        LTORG

        END