$A NLS=2;JUST=1 $A TAB=5,10,15,20,25,30,58 $B6 $LUM @A @DESCRIPTION OF THE @I@C@L 2970 @SYSTEM $B6 $LUM @PHILIP @A.@F. @HARTLEY $B6 $LUM @COMPUTER @SCIENCE 4 @PROJECT $B8 $A INDENT=7 $LIU @VERSION 2.2 $N $A INDENT=1 $LUI @CONTENTS $B1 $L2I 0. @INTRODUCTION. 1. @HARDWARE @DESCRIPTION. $A INDENT=2 $L6I 1.1 @THE @ORDER @CODE @PROCESSOR 1.2 @THE @STORE @ACCESS @CONTROLLER. 1.3 @THE @STORE @MULTIPLE @ACCESS @CONTROLLER. 1.4 @THE @STORE @INPUT @CONTROLLER. 1.5 @PERIPHERALS AND @CONTROLLERS. 1.6 @THE .RCO 2970 @CONFIGURATION. $A INDENT=1 2. @VIRTUAL @ADDRESSING AND @PROTECTION. $A INDENT=2 $L4I 2.1 @VIRTUAL @ADDRESS @FORMAT. 2.2 @PROTECTION. 2.3 @SEGMENT @TABLES. 2.4 @PAGE @TABLES. $A INDENT=1 $LI 3. @THE @IMAGE @STORE. $A INDENT=2 $LI 3.1 @REGISTERS INTERNAL TO THE .OCP. $A INDENT=3 $L2I 3.1.1 @VISIBLE @REGISTERS. 3.1.2 @INVISIBLE @REGISTERS. $A INDENT=2 $LI 3.2 @EXTERNAL REGISTERS. $A INDENT=1 $LI 4. @NEW @RANGE @ORDER @CODE. $A INDENT=2 $LI 4.1 @THE @STACK. $A INDENT=3 $L3I 4.1.1 @STACK @FRONT .(SF). 4.1.2 @LOCAL @NAME @BASE .(LNB). 4.1.3 @STACK @SEGMENT @NUMBER .(SSN). $A INDENT=2 $LI 4.2 @OTHER @USER @ADDRESSABLE @REGISTERS. $A INDENT=3 $L8I 4.2.1 @EXTRA @NAME @BASE .(XNB). 4.2.2 @ACCUMULATOR .(ACC). 4.2.3 @B @REGISTER. 4.2.4 @THE @DESCRIPTOR @REGISTER .(DR). 4.2.5 @OVERFLOW .(OV). 4.2.6 @THE @CONDITION @CODE .(CC). 4.2.7 @PROGRAM @MASK .(PM). 4.2.8 @THE @REAL @TIME @CLOCK .(RTC). $A INDENT=2 $LI 4.3 @DESCRIPTORS. $A INDENT=3 $L4I 4.3.1 @VECTOR @DESCRIPTORS (TYPE 0). 4.3.2 @STRING @DESCRIPTORS (TYPE 1). 4.3.3 @DESCRIPTOR @DESCRIPTORS (TYPE 2). 4.3.4 @MISCELLANEOUS @DESCRIPTORS (TYPE 3). $A INDENT=4 $L3I 4.3.4.1 @CODE @DESCRIPTORS (SUBTYPE 32 OR 34). 4.3.4.2 @SYSTEM @CALL @DESCRIPTORS (SUBTYPE 35). 4.3.4.3 @ESCAPE DESCRIPTORS (SUBTYPE 37). $A INDENT=2 $LI 4.4 @ADDRESSING @MODES. $A INDENT=3 $L3I 4.4.1 @PRIMARY @ADDRESSING @MODES. 4.4.2 @SECONDARY @ADDRESSING @MODES. 4.4.3 @TERTIARY @ADDRESSING @MODES. $A INDENT=2 $LI 4.5 @INSTRUCTIONS. $A INDENT=3 $L6I 4.5.1 @STACK @CONTROL @INSTRUCTIONS. 4.5.2 .DR @INSTRUCTIONS. 4.5.3 @B @INSTRUCTIONS. 4.5.4 @CONTROL @TRANSFER @INSTRUCTIONS. 4.5.5 .ACC @INSTRUCTIONS. 4.5.6 @COMPUTATIONAL @INSTRUCTIONS. $A INDENT=4 $L4I 4.5.6.1 @LOGICAL @OPERATIONS. 4.5.6.2 @DECIMAL @OPERATIONS. 4.5.6.3 @FIXED @POINT @FUNCTIONS. 4.5.6.4 @FLOATING @POINT @FUNCTIONS. $A INDENT=3 $L2I 4.5.7 @STRING @INSTRUCTIONS. 4.5.8 @SUNDRIES. $A INDENT=1 $LI 5. @INTERRUPT @STRUCTURE. $N $A INDENT=1 $LUI 0. @INTRODUCTION. $P @THIS DOCUMENT IS NOT INTENDED TO BE A FULLY COMPREHENSIVE GUIDE TO THE 2970 BUT RATHER A GENERAL OUTLINE OF THE BASIC CONCEPTS INVOLVED IN THE SYSTEM. @THE INFORMATION IS A COMBINATION OF THAT OBTAINED FROM THE REFERENCES AND THAT GLEANED FROM PEOPLE WHO ARE CURRENTLY WORKING ON THE SYSTEM. $P @THE .ICL 2900 MACHINES ARE A SERIES OF GENERAL PURPOSE COMPUTERS, SPANNING A RANGE OF PROCESSING POWERS. @THE 2970 IS THE MEDIUM PERFORMANCE MACHINE IN THE SERIES AND .ICL ARE HOPING FOR AN EQUIVALENCE IN COMPUTING POWER TO THAT OF THE .1906A, ALTHOUGH THIS HAS STILL TO BE SHOWN IN PRACTICE. $N $A INDENT=1 $LUI 1. @HARDWARE @DESCRIPTION. $P @THE MAIN SYSTEM COMPONENTS ARE: $A INDENT=2 $L3I 1. .OCP - ORDER CODE PROCESSOR 2. .SAC - STORE ACCESS CONTROLLER 3. .SMAC - STORE MULTIPLE ACCESS CONTROLLER ( + STORE) $A INDENT=2 $B2 $LUI 1.1 @THE @ORDER @CODE @PROCESSOR $P @THE 2970 .OCP IS THE SYSTEM COMPONENT WHICH INTERPRETS THE ORDER CODE. @IT IS MICROPROGRAMMED AND FACILITIES DO EXIST TO ALLOW USERS THEIR OWN MICROCODE ROUTINES IN ORDER TO ENHANCE THE PERFORMANCE OF CERTAIN APPLICATIONS. @INSTRUCTIONS ARE OVERLAPPED IN THE FOLLOWING STAGES: $A INDENT=3 $L4I 1. @INSTRUCTION FETCH AND DECODE. 2. @OPERAND ADDRESS COMPUTATION AND FETCHING. 3. @OPERAND BUFFERING. 4. @ARITHMETIC COMPUTATION. $A INDENT=2 $P @EACH .OCP HAS 3 OUTLETS (PORT INTERFACES, SEE .SMAC), FANNED OUT FROM A SINGLE INTERFACE, FOR CONNECTION TO STORE UNITS (VIA .SMAC). @THE 2970 CAN HAVE 1 OR 2 @O@C@PS. $P .OCP - .OCP AND .OCP - .SAC COMMUNICATION IS DONE VIA THE @DIRECT @WIRED @INTERFACE WHICH CARRIES ACTIVATES AND INTERRUPTS. $B2 $V2 $V4 $LUI 1.2 @THE @STORE @ACCESS @CONTROLLER. $P @THE .SAC MULTIPLEXES THE TRANSFERS OF UP TO 8 PERIPHERAL CONTROLLERS TO AND FROM STORE. @THE LINK BETWEEN THE .SAC AND THE PERIPHERAL CONTROLLER - THE @TRUNK @INTERFACE - IS 2 BYTES WIDE AND CAN HANDLE DATA AT UP TO 4 @MB/S. @THE .SAC, LIKE THE .OCP, HAS 3 PORT INTERFACES FANNED OUT FROM A SINGLE INTERFACE. @THE .SAC CAN HAVE EITHER 4 OR 8 TRUNK LINKS. @A 2970 SYSTEM CAN HAVE AT MOST 2 @S@A@CS. $B2 $LUI 1.3 @THE @STORE @MULTIPLE @ACCESS @CONTROLLER. $P @THE .SMAC CONTROLS MULTIPLE .SAC AND .OCP ACCESSES TO THE STORE. @THE .SMAC HAS 4 PORTS OF WHICH 2 ARE DEDICATED TO @O@C@PS AND 2 ARE DEDICATED TO @S@A@CS. .SAC PORTS HAVE PRIORITY ON SIMULTANEOUS ACCESS AND PRIORITY WITHIN PAIRS IS CYCLIC. $P @THE PORT INTERFACE HAS AN 8 BYTE DATA PATH WITH A BANDWIDTH OF 16 @MB/S, 26 ADDRESS LINES (WHICH CARRY A REAL BYTE ADDRESS) AND VARIOUS CONTROL LINES. @STORE CONNECTED TO THE .SMAC CAN BE BETWEEN 1/4 AND 2 @MB IN INCREMENTS OF 1/8 @MB. @A 2970 CAN HAVE UP TO 3 @S@M@A@CS (I.E. A MAXIMUM OF 6 @MB OF STORE). $P @THE .SMAC FUNCTIONS ARE: $A INDENT=4 $L3I .READ READ 2 WORDS FROM STORE .WRITE WRITE 2 WORDS TO STORE .PARTIAL .WRITE WRITE LESS THAN 2 WORDS TO STORE $A INDENT=2 $B2 $LUI 1.4 @THE @STORE @INPUT @CONTROLLER. $P @ANOTHER USEFUL, BUT NOT NECESSARY, SYSTEM COMPONENT WHICH WILL BE AVAILABLE ON EARLY MODELS IS THE @STORE @INPUT @CONTROLLER .(SIC). @THIS IS USED TO INPUT ENGINEERS' TEST PROGRAMS STRAIGHT INTO STORE, NORMALLY FROM A PAPER TAPE READER. $A INDENT=2 $B2 $LUI 1.5 @PERIPHERALS AND @CONTROLLERS. $P @PERIPHERALS ARE CONNECTED TO PERIPHERAL CONTROLLERS BY THE @NEW @RANGE @DEVICE @INTERFACE. @THIS INTERFACE IS 1 BYTE WIDE AND ALLOWS 1900 AND @SYSTEM 4 PERIPHERALS TO BE CONNECTED AS WELL AS @NEW @RANGE PERIPHERALS. @THE TYPES OF CONTROLLERS AVAILABLE ARE: $L8I .GPC - GENERAL PERIPHERAL CONTROLLER. @USED FOR SLOW DEVICES, .OPER (OPERATING STATION), MAG. TAPE, THE 7905, ETC. .SFC - SECTORED FILE CONTROLLER. @USED FOR HANDLING FIXED HEAD DISKS. .FPC - .(DFC) FILE PERIPHERAL CONTROLLER (DISK FILE CONTROLLER) @USED FOR HANDLING THE @EXCHANGEABLE @DISK @SYSTEMS. .CNP - COMMUNICATIONS NETWORK PROCESSOR. @HANDLES REMOTE COMMUNICATION. @NOTE THAT ALL PERIPHERAL CONTROLLERS WORK ON VIRTUAL ADDRESSES. .I/O IS NORMALLY DONE THROUGH @PUBLIC @SEGMENTS (SEE BELOW) SO ANY CHANGE IN THE @PUBLIC @SEGMENT @TABLES WILL NECESSITATE THE RE-INITIALISATION OF THE PERIPHERAL CONTROLLERS. $N $A INDENT=2 $LUI 1.6 @THE @R@C@O 2970 @CONFIGURATION. $P @THE PRESENT .RCO 2970 CONFIGURATION IS: $A NLS=1 $L53 P +-------+ P +-------+ O | | O +-------+ | |-------R-------------| @S @I @C |-------------R-------| | | @S | T | | T | @S | | @M |------- -------\ +-------+ /------- -------| @M | | @A | I | | I | @A | | @C |-------N-----\ | +-------+ | /-----N-------| @C | | | T | | | | | | T | | +-------+ E | \-----| @O @C @P |-----/ | E +-------+ | | R | | | | R | | | STORE | F | +-------+ | F | STORE | | | A | | | A | | +-------+ C | | | C +-------+ 1/2 @MB E | DIRECT WIRED | E 5/8 @MB | INTERFACE | | | | | | | +-------------------------+ | | | @S @A @C | | | +-------------------------+ | | | | | | | | | | TRUNK INTERFACE | | | | | /-----------------/ | | | \----------------\ | | | | | | /--------/ | \--------\ | | | | | | | | | | | +------+ +------+ +-------+ +-----+ +-----+ | | | | | | | | | | | .GPC1 | | .GPC1 | | .CNP | | .FPC | | .SFC | | | | | | | | | | | +------+ +------+ +-------+ +-----+ +-----+ | | | | | | | | N E W R A N G E D E V I C E I N T E R F A C E | | | | .MT1 .MT2 | | | | .4*EDS 100 | .MT3 .MT4 (4*100@MB) .2*FHD | | (2*6@MB) .OPER @S .OPER @S | | .OPER @M .OPER @M | | .CR .CR | | .LP .LP $A NLS=2 .OPER @S AND .M, .CR AND .LP ARE CONNECTED TO BOTH @G@P@CS FOR RELIABILITY. $B2 $A INDENT=1 $LUI 2. @VIRTUAL @ADDRESSING AND @PROTECTION. $A INDENT=2 $B2 $LUI 2.1 @VIRTUAL @ADDRESS @FORMAT. $P @A VIRTUAL ADDRESS IS A 32 BIT QUANTITY WHICH IS INTERPRETED AS FOLLOWS: $A NLS=1 $A INDENT=3 $L8I +--------------------+-----------------------+--------+ | | | | | @SEGMENT | @WORD | @BYTE | | | | | +--------------------+-----------------------+--------+ 0 13 14 29 30 31 $A NLS=2 $A indent=2 @THEREFORE A VIRTUAL MEMORY CAN HAVE AT MOST .16K SEGMENTS CONTAINING UP TO .256K BYTES EACH. @THE VIRTUAL ADDRESS IS CONVERTED BY HARDWARE INTO A 28 BIT REAL BYTE ADDRESS BY ACCESSING THE @LOCAL @SEGMENT @TABLE (VIA THE @LOCAL @SEGMENT @TABLE @BASE REGISTER - .LSTB) FOR REFERENCES TO SEGMENTS 0 - .8K, AND THE @PUBLIC @SEGMENT @TABLE (VIA THE .PSTB) FOR SEGMENTS 8 - .16K. @THE .LSTB AND .PSTB CONTAIN A SEGMENT NUMBER LIMIT. @THEREFORE, THERE NEED NOT BE SEGMENT TABLE ENTRIES FOR ALL .16K SEGMENTS. $P @PUBLIC SEGMENTS ARE COMMON TO ALL PROCESSES ALTHOUGH LOCAL SEGMENTS CAN BE SHARED BETWEEN PROCESSES AS @GLOBAL @SEGMENTS (SEE BELOW). .I/O IS NORMALLY DONE TO AND FROM PUBLIC SEGMENTS. $A INDENT=2 $B2 $V4 $LUI 2.2 @PROTECTION @LEVELS. $P @THE METHOD OF ENFORCING PROTECTION LEVELS ON THE 2900 SYSTEM IS BY THE @ACCESS @CONTROL @REGISTER .(ACR). @EACH PROCESS HAS ASSOCIATED WITH IT AN .ACR WHOSE VALUE CANNOT BE ALTERED UNLESS THE PROCESS IS AT THE HIGHEST LEVEL OF PRIVILEGE. @A RESOURCE REQUIRING PROTECTION HAS ATTACHED TO IT A TAG - UNALTERABLE UNLESS AT THE HIGHEST LEVEL OF PRIVILEGE - AGAINST WHICH AN ACCESSING USER'S .ACR IS CHECKED. @IF THE .ACR IS LESS THAN OR EQUAL TO THE VALUE OF THIS TAG (I.E. THE LOWER THE VALUE, THE MORE PRIVILEGED IS THE PROCESS) THEN ACCESS IS ALLOWED, OTHERWISE AN INTERRUPT OCCURS. $B2 $A INDENT=2 $LUI 2.3 @SEGMENT @TABLES. $A NLS=1 $L13I 1 2 3 11 14 24 +---+---+---+---------+---+---------------+---------+ |///| | | |///| |/////////| |///| @P .|NS | .APF |///| @SEGMENT @LIMIT |/////////| |///| | | |///| |/////////| +---+---+---+-+-------+---+---------------+-+---+---+ | | | | |///| | | @A | @I | .USE | @REAL @ADDRESS |///| @F | | | | | |///| | +---+---+-----+-----------------------------+---+---+ 32 33 34 35 36 60 63 $A NLS=2 $LI @P - @SEGMENT @NON-PAGED/@PAGED. $A INDENT=3 @IF THE SEGMENT IS PAGED, THE REAL ADDRESS, TREATED AS A DOUBLE WORD ALIGNED QUANTITY (I.E. BITS 36 - 60 ARE USED), POINTS TO THE BASE OF A PAGE TABLE. @OTHERWISE THE REAL ADDRESS POINTS TO THE BASE OF THE SEGMENT WHICH IS 128 BYTE ALIGNED (I.E. BITS 57 - 60 ARE IGNORED). $A INDENT=2 $LI .NS - @SEGMENT @NON-SLAVED/@SLAVED. $A INDENT=3 @IF .NS = 0 (SEGMENT NON-SLAVED), SLAVE STORES CANNOT BE USED FOR ITEMS IN THIS SEGMENT. $A INDENT=2 $LI .APF - @ACCESS @PROTECTION @FIELD. $A INDENT=3 @THE .ACF CONTAINS A READ .ACR, A WRITE .ACR AND AN EXECUTE PERMISSION BIT. @THESE DEFINE THE PERMISSIBLE MODES OF ACCESS TO THE SEGMENT. $A INDENT=2 $LI @SEGMENT @LIMIT - $A INDENT=3 @ALL REFERENCES TO THE SEGMENT ARE CHECKED TO BE LESS THAN OR EQUAL TO THIS VALUE. @WHEN THE SEGMENT IS NON-PAGED, THE SEGMENT LIMIT IS 128 BYTE ALIGNED. @THEREFORE A SEGMENT CAN BE ANY MULTIPLE OF 128 BYTES UP TO A LIMIT OF .256K BYTES. @IF THE SEGMENT IS PAGED, IN ORDER TO CATER FOR 1024 BYTE PAGES, BITS 22 - 24 OF THE SEGMENT LIMIT SHOULD BE SET TO 111, OR UNDEFINED END EFFECTS MAY OCCUR. $A INDENT=2 $LI @A - @SEGMENT @NOT @AVAILABLE/@AVAILABLE. $A INDENT=3 @IF @A = 0 (I.E. SEGMENT NOT AVAILABLE) THEN A VIRTUAL STORE INTERRUPT OCCURS. $A INDENT=2 $LI @I - @SEGMENT @NON-SHARED/@SHARED. $A INDENT=3 @IF THE SEGMENT IS SHARED, THE REAL ADDRESS POINTS TO A @GLOBAL @SEGMENT @TABLE ENTRY, DOUBLE WORD ALIGNED. @IF THIS ENTRY IS SHARED, THE INDIRECTION PROCESS IS CONTINUED UNTIL A NON-SHARED ENTRY IS FOUND (UP TO A MAXIMUM OF 4 LEVELS). $A INDENT=2 $LI .USE - @USE @BITS. $A INDENT=3 @THESE BITS INDICATE WHETHER THE SEGMENT HAS BEEN WRITTEN TO OR READ FROM. $A INDENT=2 $LI @F - @NON-FIXED/@FIXED. $A INDENT=3 @IF THE SEGMENT IS FIXED, IT IS LOCKED DOWN IN STORE. @THIS IS USED AS AN INDICATOR TO PERIPHERAL CONTROLLERS THAT THE SEGMENT CAN BE USED FOR .I/O. $A INDENT=2 $B2 $V10 $LUI 2.4 @PAGE @TABLES. $A NLS=1 $L8I 0 2 3 4 21 31 +---+---+-----+----------------------+----------+---+ | |///| | |//////////| | | @A |///| .USE | @REAL @ADDRESS |//////////| @F | | |///| | |//////////| | +---+---+-----+----------------------+----------+---+ $A nls=2 $P @THE .A, .USE AND @F SECTIONS OF THE PAGE TABLE HAVE THE SAME FUNCTIONS AS THE CORRESPONDING SECTIONS IN A SEGMENT TABLE ENTRY. @PAGES ARE 1024 BYTES LONG, SO THE REAL ADDRESS IS ALWAYS 1024 BYTE ALIGNED. $A INDENT=1 $N $LUI 3. @THE @IMAGE @STORE. $P @THE IMAGE STORE IS A UNIFORM METHOD OF ACCESSING ALL ADDRESSABLE HARDWARE REGISTERS IN THE SYSTEM, WHETHER THE REGISTERS ARE INTERNAL TO THE .OCP OR IN SOME DEVICE CONTROLLER, FOR EXAMPLE. $P @IMAGE STORE LOCATIONS ARE ACCESSED USING THE IMAGE STORE ADDRESSING MODE OF THE .LSS, .LB, .STB, .CPB, @L AND .ST INSTRUCTIONS. @PRIVILEGE, WHICH IS NEEDED TO USE THIS MODE, IS GOVERNED BY .PRIV IN .PSR AND .DGR AND .ISR IN .SSR (SEE [2] P28). $P @THE IMAGE STORE IS NOTIONALLY SPLIT INTO 2 SECTIONS: INTERNAL AND EXTERNAL REGISTERS. $A INDENT=2 $B2 $LUI 3.1 @REGISTERS INTERNAL TO THE @O@C@P. $P @THE .OCP REGISTERS THEMSELVES ARE SPLIT INTO 2 CATEGORIES: THOSE WHICH ARE ACCESSIBLE WITHOUT PRIVILEGE THROUGH NORMAL NON-PRIVILEGED INSTRUCTIONS AND ADDRESSING MODES - THE VISIBLE REGISTERS - AND THOSE THAT ARE ACCESSED WITH THE PRIVILEGE WHICH DEFINES THE VIRTUAL MACHINE ENVIRONMENT. $B2 $A INDENT=3 $LUI 3.1.1 @VISIBLE @REGISTERS. $P @THE VISIBLE REGISTERS ARE: $A INDENT=4 $L13I .PC PROGRAM COUNTER .SF STACK FRONT .LNB LOCAL NAME BASE .XNB EXTRA NAME BASE .SSN STACK SEGMENT NUMBER .ACC ACCUMULATOR @B INDEX REGISTER .DR DESCRIPTOR REGISTER .ACS* ACCUMULATOR SIZE .OV* OVERFLOW .CC* CONDITION CODE .PM* PROGRAM MASK .RTC REAL TIME CLOCK $A INDENT=3 $LI * - VISIBLE PORTION OF .PSR BELOW. $B2 $LUI 3.1.2 @INVISIBLE @REGISTERS. $P @THE INVISIBLE REGISTERS ARE: $A INDENT=4 $L7I .SSR SYSTEM STATUS REGISTER .PSR PROGRAM STATUS REGISTER .LSTB LOCAL SEGMENT TABLE BASE .PSTB PUBLIC SEGMENT TABLE BASE .IT INTERVAL TIMER .IC INSTRUCTION COUNTER .RTZC PERIODIC INTERRUPT CONTROL $I-1 @THE SYSTEM STATUS REGISTER CONTAINS: $L4I I) @AN INTERRUPT MASK (FOR SYSTEM INTERRUPTS) II) @A PROCESSOR IDENTIFIER III) @IMAGE STORE READ/WRITE PERMISSIONS IV) @A REAL ADDRESS MODE INDICATOR $I-1 @THE PROGRAM STATUS REGISTER CONTAINS: $L6I I) @THE .ACR II) @THE PRIVILEGED BIT .(PRIV) III) @D BIT (SEE DESCRIPTORS) IV) .OV, .CC, .PM, .ACS AS ABOVE. @NOTE THAT .PM, .ACS AND .CC CAN BE ALTERED BY USE OF THE MODIFY .PSR INSTRUCTION. $A INDENT=3 $P @THE INVISIBLE .OCP REGISTERS CANNOT BE WRITTEN TO UNLESS BY IMAGE STORE ADDRESSING MODE, I.E. A NON-PRIVILEGED USER CANNOT CHANGE THE PROCESS ENVIRONMENT. $A INDENT=2 $B2 $LUI 3.2 @EXTERNAL REGISTERS. $P @THE EXTERNAL REGISTERS CONSIST OF .SMAC, .SAC, @TRUNK REGISTERS, ETC. .I/O IS CONTROLLED BY WRITING TO AND READING FROM .SAC AND PERIPHERAL CONTROLLER REGISTERS THROUGH THE IMAGE STORE ADDRESSING MODE. @ONE MAJOR CONSEQUENCE OF THIS IS THAT EXPLICIT .I/O INSTRUCTIONS ARE ELIMINATED (IN A SIMILAR BUT MORE GENERAL MANNER TO THE .PDP11). $N $A INDENT=1 $LUI 4. @NEW @RANGE @ORDER @CODE. $P @INSTRUCTIONS ARE EITHER 16 OR 32 BITS AND THERE ARE THREE FORMATS: PRIMARY, SECONDARY AND TERTIARY. @TERTIARY FORMAT IS USED EXCLUSIVELY FOR JUMPS, SECONDARY FORMAT IS USED FOR STORE TO STORE OPERATIONS, I.E. STRING MANIPULATION, AND PRIMARY FORMAT IS USED FOR THE REST. @IN ALL FORMATS THE FIRST 7 (I.E. MOST SIGNIFICANT) BITS SPECIFY THE FUNCTION AND THIS IN TURN DECIDES THE FORMAT. @FOR EXAMPLE, ANY FUNCTION WITH THE MOST SIGNIFICANT 4 BITS EQUAL TO ZERO IS A TERTIARY FORMAT INSTRUCTION. @THE OPERAND FIELD, WHICH DETERMINES THE INSTRUCTION LENGTH, IS DECODED SEPERATELY FOR EACH FORMAT. @THAT IS, THE FUNCTION DETERMINES THE FORMAT AND THIS SPECIFIES HOW THE OPERAND FIELD IS DECODED. $P @THIS MEANS THAT, IN GENERAL, A FUNCTION CAN HAVE ANY OF THE TYPES OF OPERAND ASSOCIATED WITH THE FORMAT CLASS TO WHICH IT BELONGS. @IN SOME CASES, HOWEVER, THERE WILL BE A RESTRICTION ON THE TYPE OF OPERAND ALLOWED. @FOR EXAMPLE, IN THE @STORE .DR INSTRUCTION, IT MAKES NO SENSE TO SPECIFY THE DESTINATION AS BEING INDIRECT THROUGH A DESCRIPTOR SINCE .DR WOULD HAVE TO BE LOADED WITH THIS DESCRIPTOR IN THE PROCESS. @ADDITIONALLY, SOME INSTRUCTIONS DO NOT USE THE OPERAND (E.G. THE .EXIT INSTRUCTION) AND IN THESE CASES A LITERAL OPERAND OF ZERO MUST BE SPECIFIED. $A INDENT=2 $N $LUI 4.1 @THE @STACK. $P @THE ORDER CODE IS ORIENTED TO THE USE OF A HARDWARE STACK. @THE STACK IS DEFINED BY 3 REGISTERS: $A CAPSH=0 $A NLS=1 $L22I +---+ @S@S@N -> | | | | . . . . | | +---+ @L@N@B -> | | +---+ | | . . . . | | | | +---+ |@T@O@S| @T@O@S - @TOP OF STACK ITEM +---+ @S@F -> | | . . . . . . $A INDENT=3;CAPSH='.';NLS=2 $B2 $LUI 4.1.1 @STACK @FRONT (@S@F). $P @THIS REGISTER POINTS TO THE NEXT AVAILABLE WORD ON THE STACK. @WHENEVER THE DESTINATION OF A STORE OPERATION IS SPECIFIED AS .TOS (TOP OF STACK) THE ITEM IS DEPOSITED AT .SF AND .SF IS INCREMENTED BY THE APPROPRIATE NUMBER OF LOCATIONS. @THAT IS, IF THE ACCUMULATOR IS CURRENTLY 64 BITS AND ITS CONTENTS ARE STACKED, THE VALUE WILL BE STORED AT THE WORDS .(SF) AND .(SF+1) AND .SF WILL BE INCREMENTED BY 2. @THE INVERSE IS TRUE OF LOAD OPERATIONS. @NOTE THAT .SF CANNOT BE LOADED; IT CAN ONLY BE STORED AND %ADJUSTED. @ADJUSTMENTS OF .SF AND DISPLACEMENTS RELATIVE TO .SF ARE BY A NUMBER OF WORDS; WHEN STORED THE VALUE IS A BYTE ADDRESS. $A INDENT=3 $B2 $LUI 4.1.2 @LOCAL @NAME @BASE (@L@N@B). $P @THIS REGISTER IS USED TO DEFINE THE START OF THE LOCAL NAME SPACE OF A PROCEDURE. @IT CAN BE RAISED RELATIVE TO THE .SF, LOADED AND STORED. @THE HARDWARE CHECKS THAT .LNB IS ALWAYS LESS THAN .SF. $B2 $LUI 4.1.3 @STACK @SEGMENT @NUMBER (@S@S@N). $P @THE STACK MUST ONLY USE ONE SEGMENT, IDENTIFIED BY .SSN, AND CANNOT OVERFLOW INTO THE NEXT SEGMENT EVEN IF THE LAST BYTE OF THE STACK SEGMENT AND THE FIRST BYTE OF THE SUCCEEDING SEGMENT HAVE CONTIGUOUS ADDRESSES. @THAT IS, THE MAXIMUM SIZE OF THE STACK IS .256K BYTES. $B2 $A INDENT=2 $LUI 4.2 @OTHER @USER @ADDRESSABLE @REGISTERS. $A INDENT=3 $B2 $LUI 4.2.1 @EXTRA @NAME @BASE (@X@N@B). $P @THE .LNB IS USED TO ACCESS THE LOCAL VARIABLES OF A PROCEDURE. @THE @EXTRA @NAME @BASE .(XNB) IS PROVIDED TO ACCESS GLOBAL VARIABLES OR DATA IN ANOTHER SEGMENT. @IN A HIGH LEVEL LANGUAGE SYSTEM, THE .LNB AND .XNB WOULD NORMALLY POINT TO THE CURRENT TEXTUAL LEVEL AND ONE OTHER. @SO OVERHEADS WILL OCCUR IF ACCESSES ARE MADE OUTSIDE THESE AREAS. @NOTE ALSO THAT .XNB CANNOT BE STORED. @THEREFORE, SINCE A CALLED ENVIRONMENT CANNOT PRESERVE THE CONTENTS OF .XNB, ON RETURN FROM A PROCEDURE WHICH MAY HAVE ALTERED .XNB, YOU MUST ASSUME THAT IT HAS BEEN CORRUPTED AND HENCE MUST BE RELOADED. $A INDENT=3 $B2 $LUI 4.2.2 @ACCUMULATOR (@A@C@C). $P @THE ACCUMULATOR REGISTER IS 128 BITS IN LENGTH. @IT IS SPLIT INTO 4 BY 32 BIT SECTIONS, REFERRED TO AS .A0 (MOST SIGNIFICANT), .A1, .A2 AND .A3. @THE VISIBLE PORTION OF THE ACCUMULATOR IS VARIABLE AND IS .A3, .A2 - .A3, .A0 - .A3 DEPENDING ON WHETHER THE REGISTER .ACS (ACCUMULATOR SIZE) IS 1, 2 OR 3 (I.E. INDICATING 32, 64 OR 128 BIT LENGTH). $P @WHEN .ACS IS INCREASED OR DECREASED USING @MODIFY .PSR IT IS EXTENDED ON THE LEFT WITH ZEROES OR TRUNCATED ON THE LEFT RESPECTIVELY. @THE EXTENDED PART IS UNDEFINED IF THE SIZE IS INCREASED BY WRITING DIRECT TO THE IMAGE STORE .ACS. $P @THE ACCUMULATOR SIZE GENERALLY GOVERNS THE LENGTH OF PRIMARY FORMAT OPERANDS. @THE OPERAND LENGTH MAY NOT BE THE SAME AS THE LENGTH OF THE ADDRESSED ITEM IN STORE. @IF THE LENGTHS ARE DIFFERENT THE RULES ARE, IN GENERAL: $A INDENT=4 $L8I A) @THE OPERAND LENGTH SHOULD NOT BE LESS THAN THE LENGTH OF THE ADDRESSED ITEM. B) @IF THE OPERATION IS A LOAD AND THE OPERAND LENGTH IS GREATER THAN THE LENGTH OF THE ADDRESSED ITEM, THEN THE ADDRESSED ITEM IS PADDED ON THE LEFT WITH ZEROES TO THE APPROPRIATE LENGTH. @THE INVERSE APPLIES TO STORE OPERATIONS. $A INDENT=3 $P @THERE ARE AT LEAST TWO CASES WHERE THE SECOND RULE MAY CAUSE DIFFICULTIES: $A INDENT=4 $L7I A) @EVALUATION OF AN INTEGER EXPRESSION WITH MIXED LENGTH OPERANDS. @THERE IS NO SIGN EXTENSION ON THE SHORTER QUANTITIES SO YOU MUST DO THIS BY PROGRAM. B) @EVALUATION OF EXPRESSIONS INVOLVING MIXED REAL/LONG REAL OPERANDS. @IN THIS CASE YOU WANT OPERANDS RIGHT EXTENDED WITH ZEROES. $A INDENT=3 $B2 $LUI 4.2.3 @B @REGISTER. $P @THE @B REGISTER IS A 32 BIT INDEX REGISTER. @IT IS USED, PRIMARILY, FOR MODIFYING DESCRIPTOR ADDRESSES BUT QUITE EXTENSIVE ARITHMETIC OPERATIONS CAN BE PERFORMED ON IT AND IT CAN BE USED IN LOOP CONTROL AND THE CALCULATION OF ARRAY ELEMENT ADDRESSES. $B2 $LUI 4.2.4 @THE @DESCRIPTOR @REGISTER (@D@R). $P @THE DESCRIPTOR REGISTER HOLDS A DESCRIPTOR IN STANDARD DESCRIPTOR FORMAT OR THE RESULT OF AN EXPLICIT .DR OPERATION. @ANY INDIRECT ACCESS (I.E. VIA A DESCRIPTOR) CAUSES THE DESCRIPTOR USED TO BE PLACED IN THE .DR. $B2 $LUI 4.2.5 @OVERFLOW (@O@V). $P @THIS REGISTER IS SET WHEN .ACC OR @B OVERFLOWS. @IT CAN BE ACCESSED BY THE @JUMP ON @ARITHMETIC @CONDITION INSTRUCTIONS. $B2 $LUI 4.2.6 @THE @CONDITION @CODE (@C@C). $P @THE CONDITION CODE IS SET BY VARIOUS INSTRUCTIONS AND CAN BE ACCESSED BY JUMP ON CONDITION INSTRUCTIONS. $B2 $LUI 4.2.7 @PROGRAM @MASK (@P@M). $P @THE PROGRAM MASK IS USED TO INHIBIT OR ALLOW INTERRUPTS PRODUCED BY EXCEPTIONAL CONDITIONS WITHIN A NORMAL USER PROGRAM, E.G. OVERFLOW, ARRAY BOUND FAULT. @IF THE MASK BIT CORRESPONDING TO A DEFINED INTERRUPT (SEE [2] P22) IS A 1 THEN THE INTERRUPT WILL BE RESET IF IT OCCURS AND EXECUTION WILL CONTINUE AS IF NOTHING HAD HAPPENED. $B2 $LUI 4.2.8 @THE @REAL @TIME @CLOCK (@R@T@C). $P @THE @READ @REAL @TIME @CLOCK INSTRUCTION CAUSES THE .RTC, CONSISTING OF 2 BY 32 BIT REGISTERS, @X AND .Y, TO BE READ INTO BITS 0 - 31 AND 32 - 64 OF THE .ACC. @X IS UPDATED BY SYSTEM SOFTWARE BUT @Y IS A HARDWARE BINARY COUNTER WITH A RESOLUTION OF 2 MICROSECONDS AT ITS LEAST SIGNIFICANT BIT. $B2 $A INDENT=2 $LUI 4.3 @DESCRIPTORS. $P @A DESCRIPTOR IS A 64 BIT QUANTITY WHICH FORMALLY DESCRIBES AN ITEM OF INFORMATION IN STORE. @THE ADDRESSING MODES USE DESCRIPTORS IN SEVERAL WAYS, DESCRIBED BELOW. $P @THE FIRST WORD OF THE DESCRIPTOR SPECIFIES THE TYPE OF INFORMATION BEING ADDRESSED, THE SIZE OF THE ITEM, THE NUMBER OF UNITS IT CONTAINS, ETC. @THE SECOND WORD IS THE BASE ADDRESS OF THE ITEM. $P @THE GENERAL FORM OF A DESCRIPTOR IS: $A NLS=1 $L15I 2 3 1 1 1 24 +------+------+---+-----+-----+----------------+ | | | | | | | | .TYPE | .SIZE | @A | .USC | .BCI | @BOUND / @LENGTH | @WORD 1 | | | | | | | +------+------+---+-----+-----+----------------+ | | | @B @Y @T @E @A @D @D @R @E @S @S | @WORD 2 | | +----------------------------------------------+ @A - @IGNORED. @MUST BE ZERO. .USC - @UNSCALED. .BCI - @BOUND @CHECK @INHIBIT. $A NLS=2 $B2 $A INDENT=3 $V3 $LUI 4.3.1 @VECTOR @DESCRIPTORS (TYPE 0). $P @VECTOR DESCRIPTORS ADDRESS ITEMS OF LENGTH 1, 8, 32, 64 OR 128 BITS, SPECIFIED BY THE .SIZE FIELD (0, 3, 5, 6 OR 7, RESPECTIVELY). @NOTE THAT 32, 64 AND 128 BIT QUANTITIES ARE CONSTRAINED TO START ON %WORD BOUNDARIES. @THIS IS ENSURED AUTOMATICALLY BY IGNORING THE LEAST SIGNIFICANT 2 BITS OF THE BYTE ADDRESS OF THE ITEM BEING ACCESSED. @THE .USC FIELD IS USED TO SPECIFY WHETHER AN APPLIED MODIFIER IS TO BE SCALED ACCORDING AS THE .SIZE FIELD (I.E. >>3 FOR 1 BIT, <<2 FOR 32 BIT, <<3 FOR 64 BIT AND <<4 FOR 128 BIT QUANTITIES). @THE .BCI BIT SPECIFIES WHETHER AN APPLIED MODIFIER IS TO BE CHECKED (BEFORE SCALING) AGAINST THE BOUND FIELD (AN UNSIGNED 24 BIT QUANTITY). $B2 $A INDENT=3 $LUI 4.3.2 @STRING @DESCRIPTORS (TYPE 1). $P @THE .SIZE FIELD SHOULD BE SET TO 3 (I.E. SIZE 8 BITS AS FOR TYPE 0). .USC AND .BCI SHOULD BE SET TO ZERO, SINCE MODIFICATIONS ARE NEITHER CHECKED NOR SCALED. @THE @LENGTH FIELD CONTAINS THE LENGTH IN BYTES OF THE STRING. @WORD 2 OF THE DESCRIPTOR ADDRESSES THE FIRST BYTE OF THE STRING. $B2 $LUI 4.3.3 @DESCRIPTOR @DESCRIPTORS (TYPE 2). $P @THESE DESCRIPTORS CAN BE USED INTERCHANGEABLY WITH TYPE 0 DESCRIPTORS OF SIZE 64 BITS. .SIZE SHOULD BE SET TO 6 (I.E. SIZE 64 BITS AS FOR TYPE 0 DESCRIPTORS). $B2 $LUI 4.3.4 @MISCELLANEOUS @DESCRIPTORS (TYPE 3). $P @BITS 2 - 7 SPECIFY A SUBTYPE NUMBER. @THE FOLLOWING SUBTYPES ARE RANGE DEFINED. @NOTE, HOWEVER, THAT THERE ARE OTHER IMPLEMENTATION DEFINED DESCRIPTORS TO DESCRIBE, FOR EXAMPLE, MICROPROGRAM OVERLAYS. $B2 $A INDENT=4 $LUI 4.3.4.1 @CODE @DESCRIPTORS (SUBTYPE 32 OR 34). $P @THESE DESCRIPTORS MAY ONLY BE USED TO POINT TO THE DESTINATIONS OF .CALL AND .EXIT INSTRUCTIONS. @WORD 2 CONTAINS THE BYTE ADDRESS OF THIS INSTRUCTION, WORD ALIGNED (LEAST SIGNIFICANT 2 BITS IGNORED). @WHEN THE SUBTYPE IS 32 - THE BOUNDED CASE - AN APPLIED MODIFIER IS CHECKED AGAINST THE BOUND FIELD AS FOR TYPE 0 DESCRIPTORS. @IN BOTH CASES, BOUNDED AND UNBOUNDED, THE MODIFIER IS LEFT SHIFTED ONE BEFORE ADDITION SINCE THE VALUE OF THE MODIFIER IS TAKEN TO BE A NUMBER OF HALF-WORDS. $B2 $A INDENT=4 $LUI 4.3.4.2 @SYSTEM @CALL @DESCRIPTORS (SUBTYPE 35). $P @AGAIN, THESE DESCRIPTORS CAN ONLY BE USED AS THE DESTINATIONS OF .CALL AND .EXIT INSTRUCTIONS. @SYSTEM CALL DESCRIPTORS ARE USED TO MAKE CALLS TO MORE PRIVILEGED SOFTWARE IN A SIMILAR FASHION TO THE .SVC MECHANISM. $B2 $LUI 4.3.4.3 @ESCAPE @DESCRIPTORS (SUBTYPE 37). $P @THIS TYPE OF DESCRIPTOR EXISTS PRIMARILY TO IMPLEMENT THUNKS. @IF SUCH A DESCRIPTOR IS LOADED INTO THE .DR BY NORMAL INDIRECT ACTION OR ONE IS FOUND IN .DR WHEN THE @MODIFY .DR INSTRUCTION IS USED, THE FOLLOWING ACTION IS TAKEN. @THE .PC IS STACKED AS A 32 BIT QUANTITY AND A BRANCH IS MADE TO A ROUTINE WHOSE 32 BIT ADDRESS IS SPECIFIED BY THE CONTENTS OF THE LOCATION POINTED TO BY WORD 2 OF THE DESCRIPTOR (A BYTE ADDRESS, WORD ALIGNED). @THE .ESEX (ESCAPE EXIT) INSTRUCTION IS USED AT THE END OF SUCH A ROUTINE, LOADING THE .PC FROM THE STACK AND SETTING THE @D BIT IN .PSR. @WHEN THIS BIT IS SET AND INDIRECTION IS SPECIFIED IN AN INSTRUCTION, THE INDIRECTION IS IGNORED AND THE DESCRIPTOR ALREADY IN .DR IS USED, THE INSTRUCTION THEN BEING EXECUTED AND AT THE END THE @D BIT RESET. @THEREFORE THE ESCAPE ROUTINE SHOULD LOAD INTO THE .DR THE REQUIRED DESCRIPTOR AND REPEAT THE INTERRUPTED INSTRUCTION WITH THIS VALUE. $B2 $A INDENT=2 $LUI 4.4 @ADDRESSING @MODES. $P @THE NOTATION USED BELOW IS: $L6I .TOS - TOP OF STACK ITEM .$@DESC+MOD - ITEM ADDRESSED BY DESCRIPTOR AT .DESC MODIFIED BY .MOD (EXCEPT FOR .$@DR IN WHICH CASE THE DESCRIPTOR IS ALREADY IN .DR). (EXPR) - ITEM ADDRESSED BY EXPR. .REG - CAN BE REPLACED BY .LNB, .XNB, .PC, .SSN. $A INDENT=3 $B2 $LUI 4.4.1 @PRIMARY @ADDRESSING @MODES. $P @PRIMARY ADDRESSING MODES USE THE OPERAND FIELD TO SPECIFY EITHER A LITERAL VALUE OR AN ADDRESS. $P 16 BIT INSTRUCTIONS CAN HAVE THE FOLLOWING OPERANDS: $A INDENT=4 $L10I N - SIGNED 7 BIT LITERAL (@L@N@B+N) - N UNSIGNED $@(@L@N@B+N) - N UNSIGNED .TOS - TOP OF STACK ITEM .$@TOS - DESCRIPTOR AT THE TOP OF STACK .$@TOS+B - " " " " " " MODIFIED BY .B. .$@DR - DESCRIPTOR IN .DR .$@DR+B - " " " MODIFIED BY @B .$@DR+TOS - " " " MODIFIED BY .TOS @B - @B REGISTER $A INDENT=3 $P 32 BIT INSTRUCTIONS CAN HAVE THE FOLLOWING OPERANDS: $A INDENT=4 $L8I @N - 18 BIT SIGNED LITERAL .(REG+N) - DIRECT .$@(REG+N) - DESCRIPTOR IN STORE .$@(REG+N)+B - " " " MODIFIED .$@DR+(REG+N) - " " .DR " .$@DR+N .IS(N) - IMAGE STORE LOCATION @N .IS(B) - IMAGE STORE LOCATION @B $A INDENT=3 @NOTE THAT @N IS ONLY SIGNED WHEN IT IS A LITERAL OR IT IS ADDED TO THE .PC. $B2 $A INDENT=3 $LUI 4.4.2 @SECONDARY @ADDRESSING @MODES. $P @SECONDARY INSTRUCTIONS ARE THE STORE TO STORE OPERATIONS. @OPERANDS ARE SPECIFIED BY STRING OR BYTE DESCRIPTORS IN THE .DR (DESTINATION STRING) AND/OR THE .ACC (SOURCE STRING). $P @THE OPERAND FIELD IS DECODED AS FOLLOWS: $A NLS=1 $A INDENT=4 $L8I +----------+---+---+----------+ | | | | | | @FUNCTION | @H | @Q | N | | | | | | +----------+---+---+----------+ 7 1 1 7 $A indent=3 $A NLS=2 $L2i @IF @H = 0 THEN @L = N + 1 ELSE @L = LENGTH OF DESTINATION STRING, $L4I WHERE @L IS THE NUMBER OF BYTES INVOLVED IN THE OPERATION. @IF @Q = 0 THEN 16 BIT INSTRUCTION ELSE 32 BIT INSTRUCTION. $P @IF THE INSTRUCTION IS 32 BITS THEN THE SECOND 16 BITS ARE INTERPRETED AS FOLLOWS: $A INDENT=4 $A NLS=1 $L8I +----------------+----------------+ | | | | .MASK | @LITERAL/@FILLER | | | | +----------------+----------------+ 8 8 $A INDENT=3;NLS=2 $P @IF AN INSTRUCTION USES THESE FIELDS AND A 16 BIT FORMAT IS SPECIFIED, THE MASK IS TAKEN FROM BITS 16 - 23 OF THE @B REGISTER AND THE LITERAL/FILLER FROM BITS 24 - 31. $A INDENT=3 $B2 $LUI 4.4.3 @TERTIARY @ADDRESSING @MODES. $P @TERTIARY INSTRUCTIONS ARE THE JUMP ON CONDITION FUNCTIONS. @THEREFORE THE INSTRUCTION PROVIDES A 4 BIT MASK FOR CONDITION TESTING AND AN OPERAND. @THE OPERAND FORMS AVAILABLE ARE: $L8I 32 BIT: @N .$@DR+N .(REG+N) 16 BIT: .$@DR .$@DR+B $B2 $A INDENT=2 $LUI 4.5 @INSTRUCTIONS. $P @THE INSTRUCTIONS OF THE MACHINE CAN BE BROKEN UP INTO THE 8 SECTIONS BELOW. $B2 $A INDENT=3 $LUI 4.5.1 @STACK @CONTROL @INSTRUCTIONS. $P @THESE ARE THE INSTRUCTIONS WHICH ACCESS REGISTERS .SF, .LNB AND .XNB. @NOTE THE INCONSISTENCY BETWEEN TREATMENT OF REGISTERS: $A INDENT=4 $LCUI LOAD | STORE | ADJUST $L4I | | .LNB | .LNB | .LNB X | .SF | .SF .XNB | X | X $A INDENT=3 $B2 $LUI 4.5.2 @D@R @INSTRUCTIONS. $P @THESE INSTRUCTIONS PROVIDE FACILITIES FOR LOADING, CREATING, MODIFYING AND CHECKING DESCRIPTORS IN .DR. $B2 $LUI 4.5.3 @B @INSTRUCTIONS. $P @FUNCTIONS FOR LOADING, STORING, COMPARING, COMPARING & INCREMENTING ARE PROVIDED AS WELL AS ADD, SUBTRACT, MULTIPLY AND A DOPE VECTOR MULTIPLY TO HELP CALCULATION OF ARRAY ELEMENT ADDRESSES. $B2 $LUI 4.5.4 @CONTROL @TRANSFER @INSTRUCTIONS. $P @THE USUAL JUMP AND JUMP ON CONDITION INSTRUCTIONS ARE PROVIDED. @THERE IS A CYCLE CONTROL INSTRUCTION - DECREMENT @B AND JUMP IF NON-ZERO. $P @THREE TYPES OF PROCEDURE CALL ARE IMPLEMENTED: $A INDENT=4 $L6I A) @JUMP AND @LINK. @SAME NAME SPACE. B) .CALL. @DIFFERENT NAME SPACE. C) @ESCAPE ROUTINES. @BINDING PROCEDURE WITH THE SAME NAME SPACE (SEE ABOVE). $A INDENT=3 $P @THE .CALL INSTRUCTION IS USED IN ENTERING HIGH LEVEL LANGUAGE PROCEDURES. @A LINK DESCRIPTOR IS PLACED AT .(LNB+1) AND .(LNB+2) AND THE JUMP TO THE ROUTINE MADE. @THIS MAKES THINGS AWKWARD BECAUSE IT VIRTUALLY ENFORCES THE FOLLOWING ENTRY SEQUENCE TO BE MADE BY THE CALLING ENVIRONMENT: $A INDENT=4 $A CAPSH='*' $L9I *TOS=LNB / STORE OLD *LNB *SF=SF+2 / LEAVE SPACE FOR LINK *TOS=PARM1 / STACK PARAMETERS . . . @T@O@S=@P@A@R@MN / N PARAMETERS *LNB=SF-PARMSIZE-3 / *LNB TO LINK SLOTS *CALL PROC / ENTER $A CAPSH='.';INDENT=3 $P @THIS MEANS THAT RESPONSIBILITY FOR UPDATING THE STACK IS LEFT WITH THE CALLING ENVIRONMENT RATHER THAN WITH THE CALLED ENVIRONMENT, WHICH WOULD BE MORE DESIRABLE. $P @EXITS ARE PROVIDED FOR RETURN FROM NORMAL ROUTINES (WHICH RETURN THE STACK TO ITS STATUS QUO) AND FROM ESCAPE ROUTINES (SEE DESCRIPTORS, ABOVE). $B2 $A INDENT=3 $LUI 4.5.5 @A@C@C @INSTRUCTIONS. $P .ACC CAN BE STORED, LOADED, STACKED & LOADED AND SET TO A PARTICULAR SIZE BEFORE BEING LOADED. @INSTRUCTIONS ARE PROVIDED TO LOAD AND STORE THE UPPER HALF OF THE ACCUMULATOR RESPECTIVELY DOUBLING AND HALVING THE .ACC SIZE BEFORE AND AFTER THE OPERATION. @THIS IS USEFUL FOR, SAY, STORING A LONG REAL INTO A REAL, I.E. YOU WANT THE MOST SIGNIFICANT BITS. $B2 $A INDENT=3 $LUI 4.5.6 @COMPUTATIONAL @INSTRUCTIONS. $P @THERE ARE A NUMBER OF OPERATIONS PROVIDED TO CONVERT BETWEEN THE VARIOUS DATA FORMATS BELOW. @REVERSE OPERATIONS ARE PROVIDED FOR NON-COMMUTATIVE FUNCTIONS. $B2 $A INDENT=4 $LUI 4.5.6.1 @LOGICAL @OPERATIONS. $P @LOGICAL FUNCTIONS ON 128 BIT QUANTITIES ARE NOT ALLOWED. @LOGICAL ADDITION AND SUBTRACTION CANNOT BE PERFORMED ON ITEMS OF 64 BITS. $B2 $LUI 4.5.6.2 @DECIMAL @OPERATIONS. $P @DECIMAL OPERANDS ARE OF THE .BCD FORMAT TYPE. @OPERATIONS ON UP TO 31 DIGITS (PLUS SIGN) CAN BE PERFORMED (I.E. 31 * 4 BITS + 4 BITS FOR THE SIGN = 128 BITS). $B2 $LUI 4.5.6.3 @FIXED @POINT @FUNCTIONS. $P 2'S COMPLEMENT FORM IS USED FOR FIXED POINT DATA. @FIXED POINT FUNCTIONS CAN BE PERFORMED ONLY ON 32 AND 64 BIT ITEMS - %NOT 128 BITS, HOWEVER. $B2 $LUI 4.5.6.4 @FLOATING @POINT @FUNCTIONS. $P @THE .IBM 360/370 FORMAT IS USED FOR FLOATING POINT ITEMS OF UP TO 128 BITS IN LENGTH. $A INDENT=3 $B2 $LUI 4.5.7 @STRING @INSTRUCTIONS. $P @THESE ARE THE TERTIARY FORMAT STORE TO STORE FUNCTIONS. @THEY ARE PERFORMED BETWEEN A STRING DESCRIBED BY A DESCRIPTOR IN .DR AND EITHER: $A INDENT=4 $L7I A) A STRING DESCRIBED BY A DESCRIPTOR IN .ACC. (FOR .MOVE, .AND STRINGS, ETC) B) A LITERAL. (FOR @MOVE @LITERAL, @SCAN @WHILE @EQUAL, ETC) C) THE ACCUMULATOR DIRECT. (FOR CONVERTING FROM ZONED DECIMAL TO PACKED DECIMAL AND THE REVERSE) $B2 $A INDENT=3 $LUI 4.5.8 @SUNDRIES. @THIS HEADING COVERS THE SEMAPHORE INSTRUCTIONS (TEST AND DECREMENT, INCREMENT AND TEST), READ REAL TIME CLOCK, DIAGNOSE, ACTIVATE (A .CPU), .IDLE AND .OUT. $N $A INDENT=1 $LUI 5. @INTERRUPT @STRUCTURE. $P @THERE ARE 12 CLASSES OF INTERRUPT: $A INDENT=3 $I-1 1. @SYSTEM @ERROR. $B0 @HARDWARE ERRORS AND SYSTEM SOFTWARE ERRORS. $I-1 2. @EXTERNAL. $B0 @FROM DEVICES NOT HAVING A DIRECT CONNECTION WITH THE STORE. @FOR EXAMPLE, REAL TIME CLOCK, MAINS MONITOR. $I-1 3. @MULTIPROCESSOR. $B0 @INTERRUPTS BETWEEN PROCESSORS SHARING THE SAME STORE. $I-1 4. @PERIPHERAL. $B0 @INTERRUPTS FROM PERIPHERAL CONTROLLERS VIA .SAC. $I-1 5. @VIRTUAL @STORE. $B0 @ACCESS TO NON-AVAILABLE SEGMENT/PAGE OR ACCESS OUTSIDE VIRTUAL MEMORY. $I-1 6. @TIMER @INTERRUPTS. $I-1 7. @PROGRAM @ERROR. $B0 2 TYPE OF PROGRAM ERROR INTERRUPTS: $B0 $I+1 A) @MASKABLE, E.G. OVERFLOW. $I+1 B) @NON-MASKABLE, E.G. ILLEGAL INSTRUCTION. $I-1 8. @SYSTEM @CALL. $B0 @INTERRUPT GENERATED BY SYSTEM CALL DESCRIPTOR USED AS DESTINATION OF A .CALL OR .EXIT INSTRUCTION. $I-1 9. @OUT. $B0 @VOLUNTARY INTERRUPT BY SOFTWARE. $I-1 10. @EXTRACODE. $B0 @MEANS OF IMPLEMENTING AN ASSIGNED FUNCTION BY SOFTWARE. $I-1 11. @EVENT @PENDING. $B0 @USED FOR SYNCHRONISING PROCESSES WORKING LARGELY INDEPENDENT OF ONE AN OTHER. $I-1 12. @INSTRUCTION COUNTER. $A INDENT=1 $P @THE INTERRUPT MASK IN .SSR (SEE ABOVE) HAS A BIT FOR EACH OF THE INTERRUPT CLASSES. $P @THE @INTERRUPT @STEERING @TABLE .(IST) HOLDS 12 AREAS, ONE FOR EACH OF THE CLASSES OF INTERRUPT, FROM WHICH REGISTERS ARE LOADED WHEN AN INTERRUPT OCCURS. @THE .IST IS HELD IN SEGMENT 8192, I.E. THE FIRST PUBLIC SEGMENT. @EACH ENTRY IS EIGHT WORDS LONG CONTAINING: $A INDENT=4 $L7I .SSN/LNB .PSR * .PC * .SSR .SSS/SF .IT .IC. $A INDENT=1 * - @THESE ARE THE ONLY ENTRIES ACCESSED IF THE STACK IS NOT SWITCHED. $P @THE 12 INTERRUPT CLASSES ABOVE ARE SPLIT INTO 2 CATEGORIES: $A INDENT=3 $L5I 1) @STACK @SWITCHING @INTERRUPTS. 2) @NON-STACK @SWITCHING @INTERRUPTS. @THEMSELVES SPLIT INTO 2 SECTIONS: A) @SYSTEM CALL (CLASS 8) B) @EXTRACODE AND INSTRUCTION COUNTER (CLASSES 10, 12). $A INDENT=1 $P @THE PROCEDURES TAKEN FOR THESE DIFFERENT TYPES OF INTERRUPTS ARE AS FOLLOWS. $A INDENT=2 $B0 @GET THE INTERRUPT TYPE (STACK SWITCHING, NON-STACK SWITCHING, SYSTEM CALL). $B0 @GET THE INTERRUPT CLASS (1 -> 12 ABOVE) IN ORDER TO INDENTIFY THE APPROPRIATE .IST ENTRY. $B $LUI @SYSTEM @CALL. $A INDENT=3 $B @LOAD NEW .PSR WITHOUT OVERWRITING .ACS. $B0 @LOAD NEW .PC. $B $A INDENT=2 $LUI @NON-STACK @SWITCHING. $B $A INDENT=3 @UNLESS 7 WORDS AT .TOS, .V.M. INTERRUPT. $B0 .TOS=SSN/LNB $B0 @STACK .PC AS A CODE DESCRIPTOR WITH .PSR AS BITS 8-31 OF THE FIRST WORD OF THE DESCRIPTOR. $B0 .SF=SF+2 $B0 @T@O@S=INTERRUPT PARAMETER $B0 .LNB=SF-6 $B0 @LOAD .PC, .PSR WITHOUT OVERWRITING .ACS. $B $A INDENT=2 $LUI @STACK @SWITCHING. $B $A INDENT=3 $B @DUMP ALL USER ACCESSIBLE REGISTERS AND .PSR, .SSR, .IT, .IC IN WORDS 0 TO 15 OF SEGMENT .SSN+1. (THERE MAT BE SOME EXTRA, IMPLEMENTATION DEFINED, INFORMATION DUMPED FROM WORDS 16 ONWARDS IF A LONG INSTRUCTION HAS BEEN INTERRUPTED IN MID FLIGHT). $B0 @LOAD THE NEW REGISTERS FROM .IST. $B0 @STACK THE INTERRUPT PARAMETER. $B0 @IF THIS IS A PROGRAM ERROR, THEN STORE THE ADDRESS OF THE OFFENDING INSTRUCTION IN WORD 16 OF THE OLD .SSN+1. $B0 @STACK THE OLD .SSN. $A INDENT=1 $P @THE INTERRUPT PARAMETER SUPPLIES THE SOFTWARE WITH EXTRA INFORMATION ABOUT THE INTERRUPT. @FOR EXAMPLE, IN THE CASE OF THE PROGRAM ERROR INTERRUPT, THE PARAMETER WOULD IDENTIFY THE CAUSE OF THE PROGRAM ERROR, E.G. WHETHER IT WAS AN ILLEGAL INSTRUCTION OR A BOUND CHECK. $E