/* EPC Imp to C Translation Release 4 Version Apr 95 */ #include "imptoc.h" /** p5defs7 */ /** 28Nov96 Added Pentium PRO only opcodes to tables */ /** p5defs6 */ /** 15Nov96 used UPPER CASE for constintegers as for C */ /** p5defs5 */ /** 21Oct96 Ame ended instrmnem for GCC assembler which is less tolerant */ /** p5defs4 */ /** 29Nov95 Corrected side effects table for INC &DEC which set the */ /** the flags register in a slightly nonstandard way(pds) */ /** 23Nov95 Added movb & retn to help optimise bit operations(pds) */ /** p5defs3 */ /** 08Aug95 Added 80 bit load and store instructions(pds) */ /** p5defs2 */ /** 01Jun95 Changes to make assembler acceptable to GNU as */ /** p5defs1 */ /** 11Oct93 Initial version */ /***/ /**/ /* Copyright (c) 1991 Edinburgh Portable Compiler Ltd. All Rights Reserved */ /**/ /**/ /*************************************************************************/ /** Internal respresentation of P5 opcodes **/ /** **/ /** All opcodes are represented as Pseudo ops with a Form and Class **/ /** **/ /** Form defines the format of the binary instruction **/ /** Class defines the resources used for instruction scheduling **/ /** **/ /** **/ /*************************************************************************/ /**/ /* Definition of forms */ /**/ #define NOFORM 0 /* No register fields */ #define JFORM 1 /* Jump Relative Form */ #define JRFORM 2 /* jump to dest in register */ #define X2LFORM 3 /* register form with rd&literal */ #define X2FORM 4 /* Normal two operans form */ #define X2IFORM 5 /* As above but one operand implied(eax or ecx) */ #define X1FORM 6 /* One operand only */ #define X1LFORM 7 /* Single literal operand */ #define F1FORM 8 /* Floating op Stktos only */ #define F2FORM 9 /* Floating op 2 Registers */ #define FMFORM 10 /* Floating op mem & TOS */ #define F2pFORM 11 /* Floating op 2 items tos pooped */ #define F2ppFORM 12 /* Floating op top 2 items both popped */ #define SLITFORM 13 /* Shift by literal instruction */ #define SHFORM 14 /* Shift by ECX */ #define STKFORM 15 /* One operand is popped or pushed */ #define F2rFORM 16 /* Floating op 2 Registers( Result -> deepest not tos) */ /***/ /**/ /* definition of instruction groups */ /**/ /*************************************************************************/ /** **/ /** represents functional grouping as follows **/ /* n */ /** **/ /** 1 integer loads **/ /** 2 floating point loads **/ /** 3 integer stores **/ /** 4 floating point stores **/ /** 5 memory read/write (load multiple etc) **/ /** 6 integer arithmetic and logical ops **/ /** 7 integer op (Unfailing ie can be executed speculatively) **/ /** 8 branch on condition **/ /** 9 branch and link on condition **/ /** 10 special register red/write **/ /** 11 floating-point unary op (rs2 => rd) **/ /** 12 floating-point binary arithmetic (rs1 op rs2 => rd) **/ /** 13 shifts **/ /** 14 floating-point comparison **/ /** **/ /** **********************************************************************/ /**/ #define SPECIAL 0 #define INTLOAD 1 #define FPLOAD 2 #define INTSTORE 3 #define FPSTORE 4 #define RWMEM 5 #define INTOPS 6 #define INTOPSu 7 #define BCC 8 #define JUMPLINK 9 #define SPECREGrw 10 #define FPOPS1 11 #define FPOPS2 12 #define SHIFTS 13 #define FPCOMPARE 14 #define FPLlit 15 #define STROP 16 #define HICODEFIX 17 #define MAXCODEGROUP HICODEFIX /**/ /**/ /* prefix indices */ /**/ #define iprefix 0 /* instruction prefix comes first */ #define asprefix 1 /* address size prefix comes second */ #define osprefix 2 /* operand size prefix is third */ #define soprefix 3 /* segment override prefix is last */ /**/ /* values for iprefiz */ /**/ #define LOOPNZ 224 /*E0*/ #define LOOPNE 224 /*E0*/ #define LOOPZ 225 /*E1*/ #define LOOPE 225 /*E1*/ #define JCXZ 227 /*E3*/ #define REPNZ 242 /*F2*/ #define REP 243 /*F3*/ #define REPE 243 /*F3*/ /**/ /* value for as&osprefix */ /**/ #define SHORTADDR 103 /*67*/ #define SHORTOPND 102 /*66*/ /**/ /* value fos segment override */ /**/ /**/ /* pseudoop group Form explanation*/ #define Unimp 0 /*NOFORM*/ /* SPECIAL Unimplemnted */ #define ADC 1 /*X2FORM*/ /* INTOPS Add with carry */ #define ADD 2 /*X2FORM*/ /* INTOPS Add integers */ #define AND 3 /*X2FORM*/ /* INTOPSu Logically and integers */ #define bound 4 /*X2FORM*/ /* INTOPSu Interrupt on bound check */ #define bt 5 /*X2FORM*/ /* INTOPSu Copy bit(1st Opnd) of (2nd opnd) to carry flag*/ #define CALL 6 /*JFORM*/ /* JUMPLINK Call relative */ #define CALLPTR 7 /*JRFORM*/ /* JUMPLINK Call via ptr */ #define cwde 8 /*NOFORM*/ /* INTOPS Convert 16 to 32 bits in acc */ #define clc 9 /*NOFORM*/ /* SPECREGrw Clear carry */ #define CLD 10 /*NOFORM*/ /* SPECREGrw Clear direction flag */ #define cmc 11 /*NOFORM*/ /* SPECREGrw Complement carry flag */ #define CMP 12 /*X2FORM*/ /* INTOPS Compare Two integers */ #define CMPSB 13 /*NOFORM*/ /* STROP Compare signed bytes */ #define CMPSD 14 /*NOFORM*/ /* STROP Compare signed words */ #define CMPB 15 /*X2FORM*/ /* INTOPS Compare Two bytes */ #define CDQ 16 /*NOFORM*/ /* INTOPS Convert double to Quad */ #define DEC 17 /*X1FORM*/ /* INTOPS Decrement register or store word*/ #define DIV 18 /*X2IFORM*/ /* INTOPSu Divide integerin EDX:EAX by operand*/ #define ENTER 19 /*STKFORM*/ /* SPECIAL Enter procedure */ #define IDIVIDE 20 /*X2IFORM*/ /* INTOPS Signed version of div */ #define IMUL 21 /*X2IFORM*/ /* INTOPS Signed multiply of EAX */ #define IMULD 22 /*X2IFORM*/ /* INTOPS Multiply Eax by operand => edx:eax*/ #define INC 23 /*X1FORM*/ /* INTOPS Increment reg or store by one */ #define JO 24 /*JFORM*/ /* BCC Jump relative if overflow */ #define JNO 25 /*JFORM*/ /* BCC Jump relative if not overflow */ #define JB 26 /*JFORM*/ /* BCC Jump relative if below ie unsigned <*/ #define JNB 27 /*JFORM*/ /* BCC Jump relative if not below ie u>=*/ #define JE 28 /*JFORM*/ /* BCC Jump relative if equal */ #define JNE 29 /*JFORM*/ /* BCC Jump relative if not equal */ #define JBE 30 /*JFORM*/ /* BCC Jump relative if below or equal */ #define JA 32 /*JFORM*/ /* BCC Jump relative if above */ #define JS 33 /*JFORM*/ /* BCC Jump relative if sigend */ #define JNS 34 /*JFORM*/ /* BCC Jump relative if not signed */ #define JP 35 /*JFORM*/ /* BCC Jump relative if parity even */ #define JNP 36 /*JFORM*/ /* BCC Jump relative if parity odd */ #define JL 37 /*JFORM*/ /* BCC Jump relative if low ie < */ #define JGE 38 /*JFORM*/ /* BCC Jump relative if greter or equal*/ #define JLE 39 /*JFORM*/ /* BCC Jump relative if less than or equall*/ #define JG 40 /*JFORM*/ /* BCC Jump relative if greater */ #define JMP 41 /*JFORM*/ /* BCC Unconditional PC relative jump */ #define JMPPTR 42 /*JRFORM*/ /* BCC Unconditional jump via a ptr */ #define LAHF 43 /*NOFORM*/ /* SPECREGrw Load AH with flags */ #define les 44 /*X2FORM*/ /* INTLOAD Load ES & register with long pointer*/ #define lds 45 /*X2FORM*/ /* INTLOAD Load DS & register with long pointer*/ #define LEA 46 /*X2FORM*/ /* INTOPS Load effective address to register*/ #define LB 48 /*X2FORM*/ /* INTLOAD Load byte */ #define LBU 49 /*X2FORM*/ /* INTLOAD Load byte unsigned */ #define LH 50 /*X2FORM*/ /* INTLOAD Load halfword */ #define LHU 51 /*X2FORM*/ /* INTLOAD Load halfword unsigned */ #define LW 52 /*X2FORM*/ /* INTLOAD Load word */ #define LEAVE 53 /*STKFORM*/ /* SPECIAL Leave procedure */ #define LODSB 54 /*NOFORM*/ /* STROP Move byte to eax from [SI] */ #define LODSD 55 /*NOFORM*/ /* STROP Move word from [SI] to EAX reg*/ #define MOV 56 /*X2FORM*/ /* INTOPSu Move reg or literal to reg(not loads)*/ #define movsr 57 /*X1FORM*/ /* SPECREGrw MOve to(from) Segment REgs */ #define MOVSB 58 /*NOFORM*/ /* STROP Move signed byte from [si] to [di]*/ #define MOVSD 59 /*NOFORM*/ /* STROP Move signed word from [si] to [di]*/ #define MOVSX 60 /*X2FORM*/ /* STROP Move with sign extension */ #define MOVZX 61 /*X2FORM*/ /* STROP Move with zero extension */ #define MOVB 62 /*X2FORM*/ /* INTOPSu Move bytereg or literal to bytereg*/ #define MUL 63 /*X2IFORM*/ /* INTOPSu Multiply EAX by integer */ #define NEG 64 /*X1FORM*/ /* INTOPS Negate signed integer */ #define NOP 65 /*NOFORM*/ /* SPECIAL No operation */ #define NOT 66 /*X1FORM*/ /* INTOPSu Not integer */ #define OR 67 /*X2FORM*/ /* INTOPSu Or integers */ #define POP 68 /*STKFORM*/ /* SPECIAL POP operand from stack */ #define PUSH 69 /*STKFORM*/ /* SPECIAL Push operand onto stack */ #define ROL 70 /*SLITFORM*/ /* SHIFTS Rotate left by lit */ #define ROLV 71 /*X2IFORM*/ /* SHIFTS Rotate left ECX times */ #define ROR 72 /*SLITFORM*/ /* SHIFTS Rotate right by lit */ #define RORV 73 /*X2IFORM*/ /* SHIFTS Rotate right ECX times */ #define SAHF 74 /*NOFORM*/ /* SPECREGrw Store AH into flags */ #define SB 75 /*X2FORM*/ /* INTSTORE Store byte */ #define ST 76 /*X2FORM*/ /* INTSTORE Store word */ #define SH 77 /*X2FORM*/ /* INTSTORE Store halfword */ #define SETO 78 /*X1FORM*/ /* INTOPSu Set Byte if overflow */ #define SETNO 80 /*X1FORM*/ /* INTOPSu Set Byte if not overflow */ #define SETB 81 /*X1FORM*/ /* INTOPSu Set Byte if below ie unsigned <*/ #define SETNB 82 /*X1FORM*/ /* INTOPSu Set Byte if not below ie u>= */ #define SETE 83 /*X1FORM*/ /* INTOPSu Set Byte if equal */ #define SETNEQ 84 /*X1FORM*/ /* INTOPSu Set Byte if not equal */ #define SETBE 85 /*X1FORM*/ /* INTOPSu Set Byte if below or equal */ #define SETA 86 /*X1FORM*/ /* INTOPSu Set Byte if above */ #define SETS 87 /*X1FORM*/ /* INTOPSu Set Byte if sigend */ #define SETNS 88 /*X1FORM*/ /* INTOPSu Set Byte if not signed */ #define SETP 89 /*X1FORM*/ /* INTOPSu Set Byte if parity even */ #define SETNP 90 /*X1FORM*/ /* INTOPSu Set Byte if parity odd */ #define SETL 91 /*X1FORM*/ /* INTOPSu Set Byte if low ie < */ #define SETGE 92 /*X1FORM*/ /* INTOPSu Set Byte if greter or equal */ #define SETLEQ 93 /*X1FORM*/ /* INTOPSu Set Byte if less than or equall*/ #define SETG 94 /*X1FORM*/ /* INTOPSu Set Byte if greater */ #define salunused 96 /*SLITFORM*/ /* SHIFTS shift left arithmetic by constant*/ #define salvunused 97 /*X2IFORM*/ /* SHIFTS shift left arithmetic by ECX*/ #define SHL 98 /*SLITFORM*/ /* SHIFTS shift left logical by constant */ #define SHLV 99 /*X2IFORM*/ /* SHIFTS shift left logical by ECX */ #define SAR 100 /*SLITFORM*/ /* SHIFTS shift right arithmetic by constant*/ #define SARV 101 /*X2IFORM*/ /* SHIFTS shift right arithmetic by ECX */ #define SHR 102 /*SLITFORM*/ /* SHIFTS shift right logical by constant*/ #define SHRV 103 /*X2IFORM*/ /* SHIFTS shift right logical by ECX */ #define SHLD 104 /*SLITFORM*/ /* SHIFTS Shift left double (unusual) */ #define SHLDV 105 /*SHFORM*/ /* SHIFTS Shift left double (unusual) */ #define SHRD 106 /*SLITFORM*/ /* SHIFTS Shift right double (unusual) */ #define SHRDV 107 /*SHFORM*/ /* SHIFTS Shift right double (unusual) */ #define SBB 108 /*X2FORM*/ /* INTOPS Subtract integers with borrow */ #define SUB 109 /*X2FORM*/ /* INTOPS Subtract integers */ #define stc 110 /*NOFORM*/ /* SPECREGrw Set carry flag */ #define STD 112 /*NOFORM*/ /* SPECREGrw Set direction flag */ #define STOSB 113 /*NOFORM*/ /* STROP Store string byte */ #define STOSW 114 /*NOFORM*/ /* STROP Store string word */ #define TESTI 115 /*X1LFORM*/ /* INTOPSu test against immediate opnd */ #define TEST 116 /*X2FORM*/ /* INTOPSu Test 2 operands */ #define wait 117 /*NOFORM*/ /* SPECIAL wait (for ints pending ) */ #define XCHG 118 /*X2FORM*/ /* INTSTORE Exchange register with data */ #define XOR 119 /*X2FORM*/ /* INTOPSu Exclusive or integers */ #define XORI 120 /*X2FORM*/ /* INTOPSu Exclusive or integer with immediate value*/ #define RET 121 /*NOFORM*/ /* SPECIAL Return form procedure */ #define popfd 122 /*NOFORM*/ /* SPECREGrw Pop the condition flags */ #define pushfd 123 /*NOFORM*/ /* SPECREGrw Push the condition flags */ #define BSWAP 124 /*X1FORM*/ /* INTOPSu Swap the nominated reg */ #define RETN 125 /*NOFORM*/ /* SPECIAL Return from procedure & pop params*/ /** the next 16 opcodes only work on Pentium PRO chips */ #define CMOVO 126 /*X2FORM*/ /* INTOPSu Conditional Move if overflow */ #define CMOVNO 127 /*X2FORM*/ /* INTOPSu Conditional Move if not overflow*/ #define CMOVB 128 /*X2FORM*/ /* INTOPSu Conditional Move if below ie unsigned <*/ #define CMOVNB 129 /*X2FORM*/ /* INTOPSu Conditional Move if not below ie u>=*/ #define CMOVE 130 /*X2FORM*/ /* INTOPSu Conditional Move if equal */ #define CMOVNEQ 131 /*X2FORM*/ /* INTOPSu Conditional Move if not equal*/ #define CMOVBE 132 /*X2FORM*/ /* INTOPSu Conditional Move if below or equal*/ #define CMOVA 133 /*X2FORM*/ /* INTOPSu Conditional Move if above */ #define CMOVS 134 /*X2FORM*/ /* INTOPSu Conditional Move if sigend */ #define CMOVNS 135 /*X2FORM*/ /* INTOPSu Conditional Move if not signed*/ #define CMOVP 136 /*X2FORM*/ /* INTOPSu Conditional Move if parity even*/ #define CMOVNP 137 /*X2FORM*/ /* INTOPSu Conditional Move if parity odd*/ #define CMOVL 138 /*X2FORM*/ /* INTOPSu Conditional Move if low ie < */ #define CMOVGE 139 /*X2FORM*/ /* INTOPSu Conditional Move if greter or equal*/ #define CMOVLEQ 140 /*X2FORM*/ /* INTOPSu Conditional Move if less than or equall*/ #define CMOVG 141 /*X2FORM*/ /* INTOPSu Conditional Move if greater */ /***/ /**/ /* Now the floating ops */ /**/ #define FILD (16+128) /*F1FORM*/ /* FPLOAD Load integer as float to TOS*/ #define FLDd (16+129) /*F1FORM*/ /* FPLOAD Load Double to TOS */ #define FLDm (16+130) /*F1FORM*/ /* FPLOAD Load REal to TOS */ #define FISTP (16+131) /*F2pFORM*/ /* FPSTORE Store TOS as integer and POP*/ #define FSTPd (16+132) /*F2pFORM*/ /* FPSTORE Store tos as double and POP*/ #define FSTPm (16+133) /*F2pFORM*/ /* FPSTORE Store tos as real and POP*/ #define FIST (16+134) /*F2FORM*/ /* FPSTORE Store tos as integer */ #define FSTd (16+135) /*F2FORM*/ /* FPSTORE Store tos as double */ #define FSTm (16+136) /*F2FORM*/ /* FPSTORE Store tos as real */ #define FIADDm (16+137) /*FMFORM*/ /* FPOPS2 Add memory integer to Tos*/ #define FADDd (16+138) /*FMFORM*/ /* FPOPS2 Add memory double to TOS*/ #define FADDm (16+139) /*FMFORM*/ /* FPOPS2 Add memory real to TOS */ #define FADDP (16+140) /*F2FORM*/ /* FPOPS2 Add to stack items and pop Tos*/ #define FADD (16+141) /*F2FORM*/ /* FPOPS2 Add two stack items */ #define FIMULm (16+142) /*FMFORM*/ /* FPOPS2 Multiply memory integer to Tos*/ #define FMULd (16+144) /*FMFORM*/ /* FPOPS2 Multiply memory double to Tos*/ #define FMULm (16+145) /*FMFORM*/ /* FPOPS2 Multiply memory real to TOS*/ #define FMULP (16+146) /*F2FORM*/ /* FPOPS2 Multiply two stack items and pop tos*/ #define FMUL (16+147) /*F2FORM*/ /* FPOPS2 Multiply two stack items */ #define FISUBm (16+148) /*FMFORM*/ /* FPOPS2 Subtract memory integer from tos*/ #define FSUBd (16+149) /*FMFORM*/ /* FPOPS2 Subtract memory double from tos*/ #define FSUBm (16+150) /*FMFORM*/ /* FPOPS2 Subtract memory real from tos*/ #define FSUBP (16+151) /*F2FORM*/ /* FPOPS2 Subtract two stack items and pop tos*/ #define FSUB (16+152) /*F2FORM*/ /* FPOPS2 Subtract two stack items */ #define FISUBRm (16+153) /*FMFORM*/ /* FPOPS2 Reversesub memory integer from tos*/ #define FSUBRd (16+154) /*FMFORM*/ /* FPOPS2 Reversesub memory double from tos*/ #define FSUBRm (16+155) /*FMFORM*/ /* FPOPS2 Reversesub memory real from tos*/ #define FSUBRP (16+156) /*F2pFORM*/ /* FPOPS2 Reversesub two stack items and pop*/ #define FSUBR (16+157) /*F2FORM*/ /* FPOPS2 Reversesub two stack items*/ #define FIDIVm (16+158) /*FMFORM*/ /* FPOPS2 Divide memory integer into tos*/ #define FDIVd (16+160) /*FMFORM*/ /* FPOPS2 Divide memory double into tos*/ #define FDIVm (16+161) /*FMFORM*/ /* FPOPS2 Divide memory real into tos*/ #define FDIVP (16+162) /*F2FORM*/ /* FPOPS2 Divide two stack items and pop*/ #define FDIV (16+163) /*F2FORM*/ /* FPOPS2 Divide two stack items */ #define FIDIVRm (16+164) /*FMFORM*/ /* FPOPS2 Reverse Divide memory integer into tos*/ #define FDIVRd (16+165) /*FMFORM*/ /* FPOPS2 Reverse Divide memory double into tos*/ #define FDIVRm (16+166) /*FMFORM*/ /* FPOPS2 Reverse Divide memory real into tos*/ #define FDIVRP (16+167) /*F2FORM*/ /* FPOPS2 Reverse Divide two stack items and pop*/ #define FDIVR (16+168) /*F2FORM*/ /* FPOPS2 Reverse Divide two stack items*/ #define FICOMm (16+169) /*FMFORM*/ /* FPCOMPARE Compare integer with TOS*/ #define FICOMPm (16+170) /*FMFORM*/ /* FPCOMPARE Compare integer with TOS and POP*/ #define FCOMd (16+171) /*FMFORM*/ /* FPCOMPARE Compare memory double with TOS*/ #define FCOMm (16+172) /*FMFORM*/ /* FPCOMPARE Compare memory real with TOS*/ #define FCOM (16+173) /*F2FORM*/ /* FPCOMPARE Compare two stack items */ #define FCOMPd (16+174) /*FMFORM*/ /* FPCOMPARE Compare memory double with TOS*/ #define FCOMPm (16+176) /*FMFORM*/ /* FPCOMPARE Compare memory real with TOS*/ #define FCOMP (16+177) /*F2pFORM*/ /* FPCOMPARE Compare two stack items %AND pop tos*/ #define FCOMPP (16+178) /*F2ppFORM*/ /* FPCOMPARE Compare tos and tos-1 %AND pop both*/ #define FLDCW (16+179) /*X2IFORM*/ /* SPECREGrw Load F control word from Memory*/ #define FSTCW (16+180) /*X2IFORM*/ /* SPECREGrw Store F control word from Memory*/ #define FSTSW (16+181) /*X2IFORM*/ /* SPECREGrw Store F status word to memory or AX*/ #define FTST (16+182) /*F1FORM*/ /* FPCOMPARE Compare TOS with zero */ #define FCHS (16+183) /*F1FORM*/ /* FPOPS1 Change sign of TOS */ #define FLDZ (16+184) /*F1FORM*/ /* FPOPS1 Push zero onto stack */ #define FLD1 (16+185) /*F1FORM*/ /* FPOPS1 Push 1.0 onto stack */ #define FLDL2E (16+186) /*F1FORM*/ /* FPOPS1 Push log(2)e onto stack*/ #define FLDLN2 (16+187) /*F1FORM*/ /* FPOPS1 Push log(e)2 onto stack*/ #define FLDLG2 (16+188) /*F1FORM*/ /* FPOPS1 Push log(10)2 onto stack*/ #define FLDPI (16+189) /*F1FORM*/ /* FPOPS1 Push PI onto stack */ #define FABS (16+190) /*F1FORM*/ /* FPOPS1 Take ABS of TOS */ #define FDECSTP (16+192) /*NOFORM*/ /* SPECREGrw Decrement stack pointer*/ #define FRNDINT (16+193) /*F1FORM*/ /* FPOPS1 Round TOS to integer per FCW*/ #define FXCH (16+194) /*F1FORM*/ /* FPOPS1 Permute stack */ #define FSQRT (16+195) /*F1FORM*/ /* FPOPS1 Replace Tos by sqrt(tos)*/ #define FSIN (16+196) /*F1FORM*/ /* FPOPS1 Replace Tos by sin(tos) */ #define FCOS (16+197) /*F1FORM*/ /* FPOPS1 Replace Tos by cos(tos) */ #define FPTAN (16+198) /*F2FORM*/ /* FPOPS1 Remove TOS push tan(tos) and1.0*/ #define FPATAN (16+199) /*F2pFORM*/ /* FPOPS2 push atan(tos/(tos-1)) */ #define F2XM1 (16+200) /*F1FORM*/ /* FPOPS1 Computes (288tos-1) */ #define FYL2X (16+201) /*F2pFORM*/ /* FPOPS2 computes (tos-1)*log(2)tos and pops*/ #define FPREM (16+202) /*F2FORM*/ /* FPOPS2 Computes 287 partialy remainder*/ #define FPREM1 (16+203) /*F2FORM*/ /* FPOPS2 Computes IEEE partialy remainder*/ #define FILDd (16+204) /*F1FORM*/ /* FPLOAD Load 64 bit integer as float*/ #define FINIT (16+205) /*NOFORM*/ /* SPECREGrw Initialise stack pointer*/ #define FINCSTP (16+206) /*NOFORM*/ /* SPECREGrw Increment stack pointer*/ #define rFADD (16+208) /*F2rFORM*/ /* FPOPS2 Add two stack items (Result->deepest)*/ #define rFSUB (16+209) /*F2rFORM*/ /* FPOPS2 Subtract two stack items (Result->deepest)*/ #define rFSUBR (16+210) /*F2rFORM*/ /* FPOPS2 Reverse SUB two stack items (Result->deepest)*/ #define rFMUL (16+211) /*F2rFORM*/ /* FPOPS2 Multiply two stack items (Result->deepest)*/ #define rFDIV (16+212) /*F2rFORM*/ /* FPOPS2 Divide two stack items (Result->deepest)*/ #define rFDIVR (16+213) /*F2rFORM*/ /* FPOPS2 Reverse DIV two stack items (Result->deepest)*/ #define rFADDP (16+214) /*F2rFORM*/ /* FPOPS2 Add two stack items &pop(Result->deepest)*/ #define rFSUBP (16+215) /*F2rFORM*/ /* FPOPS2 Subtract two stack items&pop(Result->deepest)*/ #define rFSUBRP (16+216) /*F2rFORM*/ /* FPOPS2 Reverse SUB two stack items&pop(Result->deepest)*/ #define rFMULP (16+217) /*F2rFORM*/ /* FPOPS2 Multiply two stack items&pop(Result->deepest)*/ #define rFDIVP (16+218) /*F2rFORM*/ /* FPOPS2 Divide two stack items&pop(Result->deepest)*/ #define rFDIVRP (16+219) /*F2rFORM*/ /* FPOPS2 Reverse DIV two stack items&pop(Result->deepest)*/ #define FISTPd (16+220) /*F2pFORM*/ /* FPSTORE Store tos as 64 bit integer}*/ #define FLDq (16+221) /*F1FORM*/ /* FPLOAD Load Quad to TOS */ #define FSTPq (16+222) /*F2pFORM*/ /* FPSTORE Store tos as quad and POP*/ #define FCMOVB 239 /*F2FORM*/ /* FPOPS2 Set Byte if below ie unsigned <*/ #define FCMOVE 240 /*F2FORM*/ /* FPOPS2 Set Byte if equal */ #define FCMOVBE 241 /*F2FORM*/ /* FPOPS2 Set Byte if below or equal */ #define FCMOVU 242 /*F2FORM*/ /* FPOPS2 Set Byte if above */ #define FCMOVGE 243 /*F2FORM*/ /* FPOPS2 Set Byte if not below ie u>=*/ #define FCMOVNE 244 /*F2FORM*/ /* FPOPS2 Set Byte if not equal */ #define FCMOVG 245 /*F2FORM*/ /* FPOPS2 Set Byte if greater */ #define FCMOVNU 246 /*F2FORM*/ /* FPOPS2 Set Byte if not signed */ #define FCOMI 247 /*F2FORM*/ /* FPOPS2 Compare 2 items => integer CC*/ #define FUCOMI 248 /*F2FORM*/ /* FPOPS2 Compare 2 (unordered) => integer CC*/ #define FCOMIP 249 /*F2pFORM*/ /* FPOPS2 Compare 2 items => integer CC and pop once*/ #define FUCOMIP 250 /*F2PFORM*/ /* FPOPS2 Compare 2 (unordered?) => integer CC and pop once*/ #define mMAXMNEM 250 /**/ /* More familiar or duplicate forms of some instructions */ /**/ #define JNAE JB #define JAE JNB #define JZ JE #define JNZ JNE #define JNA JBE #define JNBE JA #define JPE JP #define JNGE JL #define JNL JGE #define JNG JLE #define JNLE JG #define JPO JNP #define SETNAE SETB #define SETAE SETNB #define SETZ SETE #define SETNZ SETNEQ #define SETNA SETBE #define SETNBE SETA #define SETPE SETP #define SETPO SETNP #define SETNGE SETL #define SETNL SETGE #define SETNG SETLEQ #define SETNLE SETG #define ld LW #define lhz LHU #define lbz LBU #define sth SH #define stb SB /***/ /*%IF modulename="code" %OR modulename="targetprocs" %OR modulename="bprocs"%START*/ static const unsigned char instrgroup [mMAXMNEM+1] = {SPECIAL, INTOPS,INTOPS,INTOPSu,INTOPSu,INTOPSu,JUMPLINK,JUMPLINK, INTOPS,SPECREGrw,SPECREGrw,SPECREGrw,INTOPS,STROP, STROP,INTOPS, INTOPS,INTOPS,INTOPSu,SPECIAL,INTOPS,INTOPS,INTOPS, INTOPS, BCC,BCC,BCC,BCC,BCC,BCC,BCC,0, BCC,BCC,BCC,BCC,BCC,BCC,BCC,BCC, BCC,BCC,BCC,SPECREGrw,INTLOAD,INTLOAD,INTOPS,0, INTLOAD,INTLOAD,INTLOAD,INTLOAD,INTLOAD,SPECIAL,STROP, STROP, INTOPSu,SPECREGrw,STROP,STROP,STROP,STROP,INTOPSu, INTOPSu, INTOPS,SPECIAL,INTOPSu,INTOPSu,SPECIAL,SPECIAL,SHIFTS, SHIFTS, SHIFTS,SHIFTS,SPECREGrw,INTSTORE,INTSTORE,INTSTORE, INTOPSu,0, INTOPSu,INTOPSu,INTOPSu,INTOPSu,INTOPSu,INTOPSu,INTOPSu, INTOPSu, INTOPSu,INTOPSu,INTOPSu,INTOPSu,INTOPSu,INTOPSu,INTOPSu, 0, SHIFTS,SHIFTS,SHIFTS,SHIFTS,SHIFTS,SHIFTS,SHIFTS, SHIFTS, SHIFTS,SHIFTS,SHIFTS,SHIFTS,INTOPS,INTOPS,SPECREGrw, 0, SPECREGrw,STROP,STROP,INTOPSu,INTOPSu,SPECIAL,INTSTORE, INTOPSu, INTOPSu,SPECIAL,SPECREGrw,SPECREGrw,INTOPSu,SPECIAL, INTOPSu,INTOPSu, INTOPSu,INTOPSu,INTOPSu,INTOPSu,INTOPSu,INTOPSu,INTOPSu, INTOPSu, INTOPSu,INTOPSu,INTOPSu,INTOPSu,INTOPSu,INTOPSu,0, 0, FPLOAD,FPLOAD,FPLOAD,FPSTORE,FPSTORE,FPSTORE,FPSTORE, FPSTORE, FPSTORE,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2, 0, FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2, FPOPS2, FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2, 0, FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2, FPOPS2, FPOPS2,FPCOMPARE,FPCOMPARE,FPCOMPARE,FPCOMPARE,FPCOMPARE, FPCOMPARE,0, FPCOMPARE,FPCOMPARE,FPCOMPARE,SPECREGrw,SPECREGrw, SPECREGrw,FPCOMPARE,FPOPS1, FPOPS1,FPOPS1,FPOPS1,FPOPS1,FPOPS1,FPOPS1,FPOPS1, 0, SPECREGrw,FPOPS1,FPOPS1,FPOPS1,FPOPS1,FPOPS1,FPOPS1, FPOPS2, FPOPS1,FPOPS2,FPOPS2,FPOPS2,FPLOAD,SPECREGrw,SPECREGrw, 0, FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2, FPOPS2, FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPSTORE,FPLOAD,FPSTORE, FPOPS2, FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2,FPOPS2, FPOPS2, FPOPS2,FPOPS2,FPOPS2}; /*%FINISH */ /*%IF modulename="code" %OR modulename="targetprocs" %START */ #if(TargetABI==LynxOS) static char * instrmnem [mMAXMNEM+1] = {"unimp ", "adcl ","addl ","andl ", "bound ","bt ","call ","call ", "cwde ","clc ","cld ","cmc ", "cmpl ","cmpsb ","cmpsd ","cmpb ", "cltd ","dec ","div ","enter ", "idivl ","imull ","unusd ","inc ", "jo ","jno ","jb ","jnb ", "je ","jne ","jbe ","", "ja ","js ","jns ","jp ", "jnp ","jl ","jge ","jle ", "jg ","jmp ","jmp ","lahf ", "les ","lds ","lea ","", "movsbl ","movzbl ","movswl ","movzwl ", "movl ","leave ","lodsb ","lodsd ", "movl ","movsr ","movsb ","movsl ", "movswl ","movzx ","movb ","mull ", "negl ","nop ","notl ","orl ", "popl ","pushl ","roll ","roll ", "rorl ","rorl ","sahf ","movb ", "movl ","movw ","seto ","", "setno ","setb ","setnb ","sete ", "setne ","setbe ","seta ","sets ", "setns ","setp ","setnp ","setl ", "setge ","setle ","setg ","", "sall ","sall ","shll ","shll ", "sarl ","sarl ","shrl ","shrl ", "shld ","shldv ","shrd ","shrdv ", "sbbl ","subl ","stc ","", "std ","stosb ","stosw ","testi ", "testl ","wait ","xchgl ","xorl ", "xori ","ret ","popfl ","pushfl ", "bswap ","ret ","cmovo ","cmovno ", "cmovb ","cmovnb ","cmove ","cmovne ", "cmovbe ","cmova ","cmovs ","cmovns ", "cmovp ","cmovnp ","cmovl ","cmovge ", "cmovle ","cmovg ","","", "fildl ","fldl ","flds ","fistpl ", "fstpl ","fstps ","fistl ","fstl ", "fsts ","fiaddl ","faddl ","fadds ", "faddp ","fadd ","fimull ","", "fmull ","fmuls ","fmulp ","fmul ", "fisubl ","fsubl ","fsubs ","fsubrp ", "fsub ","fisubrl","fsubrl ","fsubrs ", "fsubp ","fsubr ","fidivl ","", "fdivl ","fdivs ","fdivrp ","fdiv ", "fidivrl","fdivrl ","fdivrs ","fdivp ", "fdivr ","ficoml ","ficompl","fcoml ", "fcoms ","fcom ","fcompl ","", "fcomps ","fcomp ","fcompp ","fldcw ", "fstcw ","fnstsw ","ftst ","fchs ", "fldz ","fld1 ","fldl2e ","fldln2 ", "fldlg2 ","fldpi ","fabs ","", "fdecstp","frndint","fxch ","fsqrt ", "fsin ","fcos ","fptan ","fpatan ", "f2xm1 ","fyl2x ","fprem ","fprem1 ", "fildq ","finit ","fincstp","", "rfadd ","rfsub ","rfsubr ","rfmul ", "rfdiv ","rfdivr ","rfaddp ","rfsubp ", "rfsubrp","rfmulp ","rfdivp ","rfdivrp", "fistpq ","fldt ","fstpt ","fcmovb ", "fcmove ","fcmovbe","fcmovu ","fcmovnb", "fcmovne","fcmovnbe","fcmovnu","fcomi ", "fucomi ","fcomip ","fucomip"}; #else static char * instrmnem [mMAXMNEM+1] = {"unimp ", "adcl ","addl ","andl ", "bound ","bt ","call ","call ", "cwde ","clc ","cld ","cmc ", "cmpl ","cmpsb ","cmpsd ","cmpb ", "cltd ","dec ","div ","enter ", "idiv ","imull ","unusd ","inc ", "jo ","jno ","jb ","jnb ", "je ","jne ","jbe ","", "ja ","js ","jns ","jp ", "jnp ","jl ","jge ","jle ", "jg ","jmp ","jmp ","lahf ", "les ","lds ","lea ","", "movsbl ","movzbl ","movswl ","movzwl ", "movl ","leave ","lodsb ","lodsd ", "movl ","movsr ","movsb ","movsl ", "movswl ","movzx ","movb ","mull ", "negl ","nop ","notl ","orl ", "popl ","pushl ","roll ","roll ", "rorl ","rorl ","sahf ","movb ", "movl ","movw ","seto ","", "setno ","setb ","setnb ","sete ", "setne ","setbe ","seta ","sets ", "setns ","setp ","setnp ","setl ", "setge ","setle ","setg ","", "sall ","sall ","shll ","shll ", "sarl ","sarl ","shrl ","shrl ", "shld ","shldv ","shrd ","shrdv ", "sbbl ","subl ","stc ","", "std ","stosb ","stosw ","testi ", "testl ","wait ","xchgl ","xorl ", "xori ","ret ","popfl ","pushfl ", "bswap ","ret ","cmovo ","cmovno ", "cmovb ","cmovnb ","cmove ","cmovne ", "cmovbe ","cmova ","cmovs ","cmovns ", "cmovp ","cmovnp ","cmovl ","cmovge ", "cmovle ","cmovg ","","", "fildl ","fldl ","flds ","fistpl ", "fstpl ","fstps ","fistl ","fstl ", "fsts ","fiaddl ","faddl ","fadds ", "faddp ","fadd ","fimull ","", "fmull ","fmuls ","fmulp ","fmul ", "fisubl ","fsubl ","fsubs ","fsubrp ", "fsub ","fisubrl","fsubrl ","fsubrs ", "fsubp ","fsubr ","fidivl ","", "fdivl ","fdivs ","fdivrp ","fdiv ", "fidivrl","fdivrl ","fdivrs ","fdivp ", "fdivr ","ficoml ","ficompl","fcoml ", "fcoms ","fcom ","fcompl ","", "fcomps ","fcomp ","fcompp ","fldcw ", "fstcw ","fnstsw ","ftst ","fchs ", "fldz ","fld1 ","fldl2e ","fldln2 ", "fldlg2 ","fldpi ","fabs ","", "fdecstp","frndint","fxch ","fsqrt ", "fsin ","fcos ","fptan ","fpatan ", "f2xm1 ","fyl2x ","fprem ","fprem1 ", "fildll ","finit ","fincstp","", "rfadd ","rfsub ","rfsubr ","rfmul ", "rfdiv ","rfdivr ","rfaddp ","rfsubp ", "rfsubrp","rfmulp ","rfdivp ","rfdivrp", "fistpq ","fldt ","fstpt ","fcmovb ", "fcmove ","fcmovbe","fcmovu ","fcmovnb", "fcmovne","fcmovnbe","fcmovnu","fcomi ", "fucomi ","fcomip ","fucomip"}; #endif; /***/ static const unsigned char instrform [mMAXMNEM+1] = {NOFORM, X2FORM,X2FORM,X2FORM,X2FORM,X2FORM,JFORM,JRFORM, NOFORM,NOFORM,NOFORM,NOFORM,X2FORM,NOFORM,NOFORM, X2FORM, NOFORM,X1FORM,X2IFORM,STKFORM,X2IFORM,X2IFORM,X2IFORM, X1FORM, JFORM,JFORM,JFORM,JFORM,JFORM,JFORM,JFORM,0, JFORM,JFORM,JFORM,JFORM,JFORM,JFORM,JFORM,JFORM, JFORM,JFORM,JRFORM,NOFORM,X2FORM,X2FORM,X2FORM,0, X2FORM,X2FORM,X2FORM,X2FORM,X2FORM,STKFORM,NOFORM, NOFORM, X2FORM,X1FORM,NOFORM,NOFORM,X2FORM,X2FORM,X2FORM, X2IFORM, X1FORM,NOFORM,X1FORM,X2FORM,STKFORM,STKFORM,SLITFORM, X2IFORM, SLITFORM,X2IFORM,NOFORM,X2FORM,X2FORM,X2FORM,X1FORM, 0, X1FORM,X1FORM,X1FORM,X1FORM,X1FORM,X1FORM,X1FORM, X1FORM, X1FORM,X1FORM,X1FORM,X1FORM,X1FORM,X1FORM,X1FORM, 0, SLITFORM,X2IFORM,SLITFORM,X2IFORM,SLITFORM,X2IFORM, SLITFORM,X2IFORM, SLITFORM,SHFORM,SLITFORM,SHFORM,X2FORM,X2FORM,NOFORM, 0, NOFORM,NOFORM,NOFORM,X1LFORM,X2FORM,NOFORM,X2FORM, X2FORM, X2FORM,NOFORM,NOFORM,NOFORM,X1FORM,NOFORM,X2FORM, X2FORM, X2FORM,X2FORM,X2FORM,X2FORM,X2FORM,X2FORM,X2FORM, X2FORM, X2FORM,X2FORM,X2FORM,X2FORM,X2FORM,X2FORM,0,0, F1FORM,F1FORM,F1FORM,F2pFORM,F2pFORM,F2pFORM,F2FORM, F2FORM, F2FORM,FMFORM,FMFORM,FMFORM,F2FORM,F2FORM,FMFORM, 0, FMFORM,FMFORM,F2FORM,F2FORM,FMFORM,FMFORM,FMFORM, F2FORM, F2FORM,FMFORM,FMFORM,FMFORM,F2pFORM,F2FORM,FMFORM, 0, FMFORM,FMFORM,F2FORM,F2FORM,FMFORM,FMFORM,FMFORM, F2FORM, F2FORM,FMFORM,FMFORM,FMFORM,FMFORM,F2FORM,FMFORM, 0, FMFORM,F2pFORM,F2ppFORM,X2IFORM,X2IFORM,X2IFORM,F1FORM, F1FORM, F1FORM,F1FORM,F1FORM,F1FORM,F1FORM,F1FORM,F1FORM, 0, NOFORM,F1FORM,F1FORM,F1FORM,F1FORM,F1FORM,F2FORM, F2pFORM, F1FORM,F2pFORM,F2FORM,F2FORM,F1FORM,NOFORM,NOFORM, 0, F2rFORM,F2rFORM,F2rFORM,F2rFORM,F2rFORM,F2rFORM,F2rFORM, F2rFORM, F2rFORM,F2rFORM,F2rFORM,F2rFORM,F2pFORM,F1FORM,F2pFORM, F2FORM, F2FORM,F2FORM,F2FORM,F2FORM,F2FORM,F2FORM,F2FORM, F2FORM, F2FORM,F2pFORM,F2pFORM}; /***/ /*%FINISH */ /***/ /*%IF modulename="targetprocs" %OR modulename="code" %START */ struct instrvariants{ short int valid; union { short int onlyop; short int oprrm; } u0; short int oprmr; short int oprmlit; short int oprmslit; short int oprm; short int opplusreg; short int other; short int oppcrel; unsigned char eaxlit; unsigned char subop; unsigned char allit; unsigned char opbrmlit; }; #define instrvarels 11 /* the no of elements per instr */ /**/ /* valid bits for variants */ /* at code generation time the variant is checked against these */ /* valid bits and the relevant opcode extracted. If the valid */ /* bit is zero then abort unless an escape code is set somewhere */ /**/ /**/ #define oponlyval (0x8000) /* This is only opcode*/ #define oprrmval (0x4000) /* r,r/m form is available*/ #define oprmrval (0x2000) /* r/m,r dest=store form available*/ #define oprmlitval (0x1000) /* r/m,imm32 form available */ #define oprmslitval (0x800) /* r/m,signed imm8 form available */ #define oprmval (0x400) /* Memmory form available eg inc*/ #define opplusregval (0x200) /* Only reg added to opcode */ #define otherval (0x100) /* Stll further form available eg shortreljump*/ #define oppcrelval (0x80) /* Pc relative form available(4byte)*/ #define subopval (0x40) /* Subopcode for r-m byte available*/ #define opeaxlitval (0x20) /* Specail for for op on eax with lit */ #define opallitval (0x10) /* Op on btm byte of eax with lit */ #define opbrlitval (0x8) /* Op on byte with literal */ #define opbrmlitval (0x4) /* byte r/m,imm8 form available */ /**/ /* the last 2 camn occur on almost every op from 80086 days but */ /* are only used when useful in 32 bit form ie on OR,XOR and TEST */ /**/ static const short int instrops [((instrvarels*mMAXMNEM)+instrvarels)-1+1] = {0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,((((oprrmval|oprmrval)|oprmlitval)|oprmslitval)|subopval)|opeaxlitval, 0x13,0x11,0x81,0x83, 0x0,0x0,0x0,0x0,0x215,0x0,((((oprrmval|oprmrval)|oprmlitval)|oprmslitval)|subopval)|opeaxlitval, 0x3, 0x1,0x81,0x83,0x0,0x0,0x0,0x0,0x5, 0x0,((((oprrmval|oprmrval)|oprmlitval)|oprmslitval)|subopval)|opeaxlitval, 0x23,0x21,0x81,0x83,0x0,0x0, 0x0,0x0,0x425,0x0,oprrmval,0x62,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,oprrmval|subopval, 0xFA3,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x400,0x0,oppcrelval,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0xE8,0x0,0x0,oprmval|subopval,0x0,0x0, 0x0,0x0,0xFF,0x0,0x0,0x0,0x200,0x0, oponlyval,0x98,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,oponlyval,0xF8,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,oponlyval,0xFC, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,oponlyval,0xF5,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,(((((((oprrmval|oprmrval)|oprmlitval)|oprmslitval)|subopval)|opeaxlitval)|opbrlitval )|opallitval)|opbrmlitval,0x3B,0x39,0x81, 0x83,0x0,0x0,0x80,0x0,0x73D,0x803C,oponlyval, 0xA6,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,oponlyval,0xA7,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,((((((oprrmval|oprmrval)|oprmlitval)|oprmslitval)|subopval)|opbrlitval)|opallitval )|opbrmlitval,0x3A,0x38, 0x80,0x0,0x0,0x0,0x80,0x0,0x73C,0x803C, oponlyval,0x99,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,(oprrmval|subopval)|opplusregval,0x0, 0x0,0x0,0x0, 0xFF,0x48,0x0,0x0,0x0,0x0,oprmval|subopval,0x0, 0x0,0x0,0x0,0xF7,0x0,0x0,0x0,0x600, 0x0,oponlyval,0xC8,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,oprmval|subopval,0x0,0x0,0x0, 0x0,0xF7,0x0,0x0,0x0,0x700,0x0,(oprrmval|oprmlitval)|oprmslitval, 0xFAF,0x0,0x69,0x6B,0x0,0x0,0x0,0x0, 0x0,0x0,oponlyval,0xF5,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,(oprrmval|subopval)|opplusregval, 0x0,0x0, 0x0,0x0,0xFE,0x40,0x0,0x0,0x0,0x0, oppcrelval|otherval,0x0,0x0,0x0,0x0,0x0,0x0,0x70, 0xF80,0x0,0x0,oppcrelval|otherval,0x0,0x0,0x0,0x0, 0x0,0x0,0x71,0xF81,0x0,0x0,oppcrelval|otherval,0x0, 0x0,0x0,0x0,0x0,0x0,0x72,0xF82,0x0, 0x0,oppcrelval|otherval,0x0,0x0,0x0,0x0,0x0,0x0, 0x73,0xF83,0x0,0x0,oppcrelval|otherval,0x0,0x0,0x0, 0x0,0x0,0x0,0x74,0xF84,0x0,0x0,oppcrelval|otherval, 0x0,0x0,0x0,0x0,0x0,0x0,0x75,0xF85, 0x0,0x0,oppcrelval|otherval,0x0,0x0,0x0,0x0,0x0, 0x0,0x76,0xF86,0x0,0x0,0,0,0, 0,0,0,0,0,0,0,0, oppcrelval|otherval,0x0,0x0,0x0,0x0,0x0,0x0,0x77, 0xF87,0x0,0x0,oppcrelval|otherval,0x0,0x0,0x0,0x0, 0x0,0x0,0x78,0xF88,0x0,0x0,oppcrelval|otherval,0x0, 0x0,0x0,0x0,0x0,0x0,0x79,0xF89,0x0, 0x0,oppcrelval|otherval,0x0,0x0,0x0,0x0,0x0,0x0, 0x7A,0xF8A,0x0,0x0,oppcrelval|otherval,0x0,0x0,0x0, 0x0,0x0,0x0,0x7B,0xF8B,0x0,0x0,oppcrelval|otherval, 0x0,0x0,0x0,0x0,0x0,0x0,0x7C,0xF8C, 0x0,0x0,oppcrelval|otherval,0x0,0x0,0x0,0x0,0x0, 0x0,0x7D,0xF8D,0x0,0x0,oppcrelval|otherval,0x0,0x0, 0x0,0x0,0x0,0x0,0x7E,0xF8E,0x0,0x0, oppcrelval|otherval,0x0,0x0,0x0,0x0,0x0,0x0,0x7F, 0xF8F,0x0,0x0,oppcrelval|otherval,0x0,0x0,0x0,0x0, 0x0,0x0,0xEB,0xE9,0x0,0x0,oprmval|subopval,0x0, 0x0,0x0,0x0,0xFF,0x0,0x0,0x0,0x400, 0x0,oponlyval,0x9F,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,oprrmval,0xC4,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,oprrmval, 0xC5,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,oprrmval,0x8D,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0,0,0, 0,0,0,0,0,0,0,0, oprrmval,0xFBE,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,oprrmval,0xFB6,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,oprrmval,0xFBF, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,oprrmval,0xFB7,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,oprrmval|otherval,0x8B,0x0,0x0, 0x0,0x0,0x0,0xA1,0x0,0x0,0x0,oponlyval, 0xC9,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,oponlyval,0xAC,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,oponlyval,0xAD,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, ((((oprrmval|oprmrval)|oprmlitval)|opbrmlitval)|opplusregval)|otherval, 0x8B,0x89,0xC7,0xC6,0x0,0xB8,0xC6, 0x0,0x0,0xC600,oprrmval,0x8E,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,oponlyval,0xA4, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,oponlyval,0xA5,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,oprrmval,0xFBF,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,oprrmval, 0xFB7,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,((((oprrmval|oprmrval)|oprmlitval)|opbrmlitval)|opplusregval)|otherval, 0x8A,0x88,0xC6,0xC6,0x0, 0xB0,0xC6,0x0,0x0,0xC600,oprmval|subopval,0x0,0x0, 0x0,0x0,0xF7,0x0,0x0,0x0,0x400,0x0, oprmval|subopval,0x0,0x0,0x0,0x0,0xF7,0x0,0x0, 0x0,0x300,0x0,oponlyval,0x90,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,oprmval|subopval,0x0, 0x0,0x0,0x0,0xF7,0x0,0x0,0x0,0x200, 0x0,((((((oprrmval|oprmrval)|oprmlitval)|oprmslitval)|subopval)|opeaxlitval)|opbrlitval)|opallitval ,0xB,0x9,0x81,0x83,0x0,0x0, 0x0,0x0,0x10D,0x800C,(oprmval|opplusregval)|subopval, 0x0,0x0,0x0, 0x0,0x8F,0x58,0x0,0x0,0x0,0x0,(((oprmval|oprmlitval)|oprmslitval)|opplusregval)|subopval, 0x0,0x0,0x68,0x6A,0xFF,0x50,0x0,0x0, 0x600,0x0,oprmslitval|subopval,0x0,0x0,0x0,0xC1,0x0, 0x0,0x0,0x0,0x0,0x0,oprmval|subopval,0x0,0x0, 0x0,0x0,0xD3,0x0,0x0,0x0,0x0,0x0, oprmslitval|subopval,0x0,0x0,0x0,0xC1,0x0,0x0,0x0, 0x0,0x100,0x0,oprmval|subopval,0x0,0x0,0x0,0x0, 0xD3,0x0,0x0,0x0,0x100,0x0,oponlyval,0x9E, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,((oprmrval|oprmslitval)|otherval)|opbrmlitval, 0x0,0x88,0x0,0xC6,0x0,0x0, 0xA2,0x0,0x0,0xC600,(oprmrval|oprmlitval)|otherval, 0x0,0x89,0xC7, 0x0,0x0,0x0,0xA3,0x0,0x0,0x0,oprmrval|oprmlitval, 0x0,0x89,0xC7,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,oprmval,0x0,0x0,0x0,0x0,0xF90, 0x0,0x0,0x0,0x0,0x0,0,0,0, 0,0,0,0,0,0,0,0, oprmval,0x0,0x0,0x0,0x0,0xF91,0x0,0x0, 0x0,0x0,0x0,oprmval,0x0,0x0,0x0,0x0, 0xF92,0x0,0x0,0x0,0x0,0x0,oprmval,0x0, 0x0,0x0,0x0,0xF93,0x0,0x0,0x0,0x0, 0x0,oprmval,0x0,0x0,0x0,0x0,0xF94,0x0, 0x0,0x0,0x0,0x0,oprmval,0x0,0x0,0x0, 0x0,0xF95,0x0,0x0,0x0,0x0,0x0,oprmval, 0x0,0x0,0x0,0x0,0xF96,0x0,0x0,0x0, 0x0,0x0,oprmval,0x0,0x0,0x0,0x0,0xF97, 0x0,0x0,0x0,0x0,0x0,oprmval,0x0,0x0, 0x0,0x0,0xF98,0x0,0x0,0x0,0x0,0x0, oprmval,0x0,0x0,0x0,0x0,0xF99,0x0,0x0, 0x0,0x0,0x0,oprmval,0x0,0x0,0x0,0x0, 0xF9A,0x0,0x0,0x0,0x0,0x0,oprmval,0x0, 0x0,0x0,0x0,0xF9B,0x0,0x0,0x0,0x0, 0x0,oprmval,0x0,0x0,0x0,0x0,0xF9C,0x0, 0x0,0x0,0x0,0x0,oprmval,0x0,0x0,0x0, 0x0,0xF9D,0x0,0x0,0x0,0x0,0x0,oprmval, 0x0,0x0,0x0,0x0,0xF9E,0x0,0x0,0x0, 0x0,0x0,oprmval,0x0,0x0,0x0,0x0,0xF9F, 0x0,0x0,0x0,0x0,0x0,0,0,0, 0,0,0,0,0,0,0,0, oprmslitval|subopval,0x0,0x0,0x0,0xC1,0x0,0x0,0x0, 0x0,0x700,0x0,oprmval|subopval,0x0,0x0,0x0,0x0, 0xD3,0x0,0x0,0x0,0x700,0x0,oprmslitval|subopval,0x0, 0x0,0x0,0xC1,0x0,0x0,0x0,0x0,0x400, 0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xD3,0x0, 0x0,0x0,0x400,0x0,oprmslitval|subopval,0x0,0x0,0x0, 0xC1,0x0,0x0,0x0,0x0,0x700,0x0,oprmval|subopval, 0x0,0x0,0x0,0x0,0xD3,0x0,0x0,0x0, 0x700,0x0,oprmslitval|subopval,0x0,0x0,0x0,0xC1,0x0, 0x0,0x0,0x0,0x500,0x0,oprmval|subopval,0x0,0x0, 0x0,0x0,0xD3,0x0,0x0,0x0,0x500,0x0, oponlyval,0xFA4,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,oponlyval,0xFA5,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,oponlyval,0xFAC, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,oponlyval,0xFAD,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,((((oprrmval|oprmrval)|oprmlitval)|oprmslitval)|subopval)|opeaxlitval, 0x1B,0x19,0x81, 0x83,0x0,0x0,0x0,0x0,0x31D,0x0,((((oprrmval|oprmrval)|oprmlitval)|oprmslitval)|subopval)|opeaxlitval , 0x2B,0x29,0x81,0x83,0x0,0x0,0x0,0x0, 0x52D,0x0,oponlyval,0xF9,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0,0,0, 0,0,0,0,0,0,0,0, oponlyval,0xFD,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,oponlyval,0xAA,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,oponlyval,0xAB, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,((((oprrmval|oprmlitval)|opeaxlitval)|subopval)|opbrlitval)|opallitval, 0x85,0x0,0xF7, 0x0,0x0,0x0,0x0,0x0,0xA9,0xF6A8,oponlyval, 0x9B,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,oprrmval,0x87,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,((((((oprrmval|oprmrval)|oprmlitval)|oprmslitval)|subopval)|opeaxlitval)|opbrlitval )|opallitval,0x33,0x31, 0x81,0x83,0x0,0x0,0x0,0x0,0x635,0x8034, 0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,oponlyval,0xC3,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,oponlyval,0x9C, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,oponlyval,0x9D,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,opplusregval,0x0,0x0,0x0, 0x0,0x0,0xFC8,0x0,0x0,0x0,0x0,oponlyval, 0xC2,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,oprrmval,0xF40,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,oprrmval,0xF41,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, oprrmval,0xF42,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,oprrmval,0xF43,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,oprrmval,0xF44, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,oprrmval,0xF45,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,oprrmval,0xF46,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,oprrmval, 0xF47,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,oprrmval,0xF48,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,oprrmval,0xF49,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, oprrmval,0xF4A,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,oprrmval,0xF4B,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,oprrmval,0xF4C, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,oprrmval,0xF4D,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,oprrmval,0xF4E,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,oprrmval, 0xF4F,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, oprmval|subopval,0x0,0x0,0x0,0x0,0xDB,0x0,0x0, 0x0,0x0,0x0,(oprmval|subopval)|opplusregval,0x0,0x0, 0x0,0x0, 0xDD,0xD9C0,0x0,0x0,0x0,0x0,oprmval|subopval,0x0, 0x0,0x0,0x0,0xD9,0x0,0x0,0x0,0x0, 0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xDB,0x0, 0x0,0x0,0x300,0x0,(oprmval|opplusregval)|subopval, 0x0,0x0,0x0, 0x0,0xDD,0xDDD8,0x0,0x0,0x300,0x0,oprmval|subopval, 0x0,0x0,0x0,0x0,0xD9,0x0,0x0,0x0, 0x300,0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xDD, 0x0,0x0,0x0,0x200,0x0,oprmval|subopval,0x0,0x0, 0x0,0x0,0xDD,0x0,0x0,0x0,0x200,0x0, oprmval|subopval,0x0,0x0,0x0,0x0,0xD9,0x0,0x0, 0x0,0x200,0x0,oprmval|subopval,0x0,0x0,0x0,0x0, 0xDA,0x0,0x0,0x0,0x0,0x0,oprmval|subopval,0x0, 0x0,0x0,0x0,0xDC,0x0,0x0,0x0,0x0, 0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xD8,0x0, 0x0,0x0,0x0,0x0,opplusregval,0x0,0x0,0x0, 0x0,0x0,0xDEC0,0x0,0x0,0x0,0x0,opplusregval, 0x0,0x0,0x0,0x0,0x0,0xD8C0,0x0,0x0, 0x0,0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xDA, 0x0,0x0,0x0,0x100,0x0,0,0,0, 0,0,0,0,0,0,0,0, oprmval|subopval,0x0,0x0,0x0,0x0,0xDC,0x0,0x0, 0x0,0x100,0x0,oprmval|subopval,0x0,0x0,0x0,0x0, 0xD8,0x0,0x0,0x0,0x100,0x0,opplusregval,0x0, 0x0,0x0,0x0,0x0,0xDEC8,0x0,0x0,0x0, 0x0,opplusregval,0x0,0x0,0x0,0x0,0x0,0xD8C8, 0x0,0x0,0x0,0x0,oprmval|subopval,0x0,0x0,0x0, 0x0,0xDA,0x0,0x0,0x0,0x400,0x0,oprmval|subopval, 0x0,0x0,0x0,0x0,0xDC,0x0,0x0,0x0, 0x400,0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xD8, 0x0,0x0,0x0,0x400,0x0,opplusregval,0x0,0x0, 0x0,0x0,0x0,0xDEE8,0x0,0x0,0x0,0x0, opplusregval,0x0,0x0,0x0,0x0,0x0,0xD8E0,0x0, 0x0,0x0,0x0,oprmval|subopval,0x0,0x0,0x0,0x0, 0xDA,0x0,0x0,0x0,0x500,0x0,oprmval|subopval,0x0, 0x0,0x0,0x0,0xDC,0x0,0x0,0x0,0x500, 0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xD8,0x0, 0x0,0x0,0x500,0x0,opplusregval,0x0,0x0,0x0, 0x0,0x0,0xDEE0,0x0,0x0,0x0,0x0,opplusregval, 0x0,0x0,0x0,0x0,0x0,0xD8E8,0x0,0x0, 0x0,0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xDA, 0x0,0x0,0x0,0x600,0x0,0,0,0, 0,0,0,0,0,0,0,0, oprmval|subopval,0x0,0x0,0x0,0x0,0xDC,0x0,0x0, 0x0,0x600,0x0,oprmval|subopval,0x0,0x0,0x0,0x0, 0xD8,0x0,0x0,0x0,0x600,0x0,opplusregval,0x0, 0x0,0x0,0x0,0x0,0xDEF8,0x0,0x0,0x0, 0x0,opplusregval,0x0,0x0,0x0,0x0,0x0,0xD8F0, 0x0,0x0,0x0,0x0,oprmval|subopval,0x0,0x0,0x0, 0x0,0xDA,0x0,0x0,0x0,0x700,0x0,oprmval|subopval, 0x0,0x0,0x0,0x0,0xDC,0x0,0x0,0x0, 0x700,0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xD8, 0x0,0x0,0x0,0x700,0x0,opplusregval,0x0,0x0, 0x0,0x0,0x0,0xDEF0,0x0,0x0,0x0,0x0, opplusregval,0x0,0x0,0x0,0x0,0x0,0xD8F8,0x0, 0x0,0x0,0x0,oprmval|subopval,0x0,0x0,0x0,0x0, 0xDA,0x0,0x0,0x0,0x200,0x0,oprmval|subopval,0x0, 0x0,0x0,0x0,0xDA,0x0,0x0,0x0,0x300, 0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xDC,0x0, 0x0,0x0,0x200,0x0,oprmval|subopval,0x0,0x0,0x0, 0x0,0xD8,0x0,0x0,0x0,0x200,0x0,opplusregval, 0x0,0x0,0x0,0x0,0x0,0xD8D0,0x0,0x0, 0x0,0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xDC, 0x0,0x0,0x0,0x300,0x0,0,0,0, 0,0,0,0,0,0,0,0, oprmval|subopval,0x0,0x0,0x0,0x0,0xD8,0x0,0x0, 0x0,0x300,0x0,opplusregval,0x0,0x0,0x0,0x0, 0x0,0xD8D8,0x0,0x0,0x0,0x0,oponlyval|opplusregval, 0xDED9, 0x0,0x0,0x0,0x0,0xDED8,0x0,0x0,0x0, 0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xD9,0x0, 0x0,0x0,0x500,0x0,oprmval|subopval,0x0,0x0,0x0, 0x0,0xD9,0x0,0x0,0x0,0x700,0x0,(oponlyval|oprmval)|subopval, 0xDFE0,0x0,0x0,0x0,0xDD,0x0,0x0,0x0, 0x700,0x0,oponlyval,0xD9E4,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,oponlyval,0xD9E0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, oponlyval,0xD9EE,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,oponlyval,0xD9E8,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,oponlyval,0xD9EA, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,oponlyval,0xD9ED,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,oponlyval,0xD9EC,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,oponlyval, 0xD9EB,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,oponlyval,0xD9E1,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0,0,0, 0,0,0,0,0,0,0,0, oponlyval,0xD9F6,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,oponlyval,0xD9FC,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,opplusregval,0x0, 0x0,0x0,0x0,0x0,0xD9C8,0x0,0x0,0x0, 0x0,oponlyval,0xD9FA,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,oponlyval,0xD9FE,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,oponlyval, 0xD9FF,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,oponlyval,0xD9F2,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,oponlyval,0xD9F3,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, oponlyval,0xD9F0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,oponlyval,0xD9F1,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0x0,oponlyval,0xD9F8, 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,oponlyval,0xD9F5,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,oprmval|subopval,0x0,0x0,0x0, 0x0,0xDF,0x0,0x0,0x0,0x500,0x0,oponlyval, 0xDBE3,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,oponlyval,0xD9F7,0x0,0x0,0x0,0x0, 0x0,0x0,0x0,0x0,0x0,0,0,0, 0,0,0,0,0,0,0,0, opplusregval,0x0,0x0,0x0,0x0,0x0,0xDCC0,0x0, 0x0,0x0,0x0,opplusregval,0x0,0x0,0x0,0x0, 0x0,0xDCE8,0x0,0x0,0x0,0x0,opplusregval,0x0, 0x0,0x0,0x0,0x0,0xDCE0,0x0,0x0,0x0, 0x0,opplusregval,0x0,0x0,0x0,0x0,0x0,0xDCC8, 0x0,0x0,0x0,0x0,opplusregval,0x0,0x0,0x0, 0x0,0x0,0xDCF8,0x0,0x0,0x0,0x0,opplusregval, 0x0,0x0,0x0,0x0,0x0,0xDCF0,0x0,0x0, 0x0,0x0,opplusregval,0x0,0x0,0x0,0x0,0x0, 0xDEC0,0x0,0x0,0x0,0x0,opplusregval,0x0,0x0, 0x0,0x0,0x0,0xDEE8,0x0,0x0,0x0,0x0, opplusregval,0x0,0x0,0x0,0x0,0x0,0xDEE0,0x0, 0x0,0x0,0x0,opplusregval,0x0,0x0,0x0,0x0, 0x0,0xDEC8,0x0,0x0,0x0,0x0,opplusregval,0x0, 0x0,0x0,0x0,0x0,0xDEF8,0x0,0x0,0x0, 0x0,opplusregval,0x0,0x0,0x0,0x0,0x0,0xDEF0, 0x0,0x0,0x0,0x0,oprmval|subopval,0x0,0x0,0x0, 0x0,0xDF,0x0,0x0,0x0,0x700,0x0,oprmval|subopval, 0x0,0x0,0x0,0x0,0xDD,0x0,0x0,0x0, 0x500,0x0,oprmval|subopval,0x0,0x0,0x0,0x0,0xDB, 0x0,0x0,0x0,0x200,0x0,opplusregval,0x0,0x0, 0x0,0x0,0x0,0xDAC0,0x0,0x0,0x0,0x0, opplusregval,0x0,0x0,0x0,0x0,0x0,0xDAC8,0x0, 0x0,0x0,0x0,opplusregval,0x0,0x0,0x0,0x0, 0x0,0xDAD0,0x0,0x0,0x0,0x0,opplusregval,0x0, 0x0,0x0,0x0,0x0,0xDAD8,0x0,0x0,0x0, 0x0,opplusregval,0x0,0x0,0x0,0x0,0x0,0xDAC0, 0x0,0x0,0x0,0x0,opplusregval,0x0,0x0,0x0, 0x0,0x0,0xDAC8,0x0,0x0,0x0,0x0,opplusregval, 0x0,0x0,0x0,0x0,0x0,0xDAD0,0x0,0x0, 0x0,0x0,opplusregval,0x0,0x0,0x0,0x0,0x0, 0xDAD8,0x0,0x0,0x0,0x0,opplusregval,0x0,0x0, 0x0,0x0,0x0,0xDBF0,0x0,0x0,0x0,0x0, opplusregval,0x0,0x0,0x0,0x0,0x0,0xDBE8,0x0, 0x0,0x0,0x0,opplusregval,0x0,0x0,0x0,0x0, 0x0,0xDFF0,0x0,0x0,0x0,0x0,opplusregval,0x0, 0x0,0x0,0x0,0x0,0xDFE8,0x0,0x0,0x0, 0x0}; /***/ /**/ /* side effects are defined as follows */ /* x'01' reads the flags register */ /* x'02' write the flag register in standard way */ /* x'04' erase the flags register (various non standard writes) */ /* x'10' reads the Floating stack pointer register */ /* x'20' updates the Floating stack pointer register */ /* x'40' read the Floating condition fields */ /* x'80' set the Floating condition fields */ static const unsigned char instrsideeffects [mMAXMNEM+1] = {0x0, 0x2,0x2,0x2,0x0,0x2,0x0,0x0, 0x0,0x4,0x4,0x4,0x2,0x3,0x3,0x2, /*16*/ 0x0,0x4,0x2,0x0,0x4,0x4,0x4,0x4, 0x1,0x1,0x1,0x1,0x1,0x1,0x1,0xFF, /*32*/ 0x1,0x1,0x1,0x1,0x1,0x1,0x1,0x1, 0x1,0x0,0x0,0x1,0x0,0x0,0x0,0xFF, /*48*/ 0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0, 0x0,0x0,0x1,0x1,0x0,0x0,0x4,0x0, /*64*/ 0x2,0x0,0x0,0x2,0x0,0x0,0x1,0x1, 0x4,0x4,0x4,0x0,0x0,0x0,0x1,0xFF, /*80*/ 0x1,0x1,0x1,0x1,0x1,0x1,0x1,0x1, 0x1,0x1,0x1,0x1,0x1,0x1,0x1,0xFF, /*96*/ 0x4,0x4,0x4,0x4,0x4,0x4,0x4,0x4, 0x4,0x4,0x4,0x4,0x2,0x2,0x4,0xFF, /*112*/ 0x4,0x1,0x1,0x2,0x2,0x0,0x0,0x2, 0x0,0x0,0x4,0x1,0x0,0x0,0x1,0x1, /*128*/ 0x1,0x1,0x1,0x1,0x1,0x1,0x1,0x1, 0x1,0x1,0x1,0x1,0x1,0x1,0xFF,0xFF, /*144*/ 0x30,0x30,0x30,0x30,0x30,0x30,0x10,0x10, 0x10,0x10,0x10,0x10,0x30,0x10,0x10,0xFF, /*160*/ 0x10,0x10,0x30,0x10,0x10,0x10,0x10,0x30, 0x10,0x10,0x10,0x10,0x30,0x10,0x10,0xFF, /*176*/ 0x10,0x10,0x30,0x10,0x10,0x10,0x10,0x30, 0x10,0x90,0xB0,0x90,0x90,0x90,0xB0,0xFF, /*192*/ 0xB0,0xB0,0xB0,0x10,0x0,0x40,0x90,0x10, 0x30,0x30,0x30,0x30,0x30,0x30,0x10,0xFF, /*208*/ 0x30,0x10,0x10,0x10,0x10,0x10,0x30,0x30, 0x10,0x30,0x10,0x10,0x30,0x20,0x30,0xFF, /*224*/ 0x10,0x10,0x10,0x10,0x10,0x10,0x30,0x30, 0x30,0x30,0x30,0x30,0x30,0x30,0x30,0x11, 0x11,0x11,0x11,0x11,0x11,0x11,0x11,0x12, 0x12,0x32,0x32}; /*0*/ /*%FINISH */ /***/ #define EAX 0 #define ECX 1 #define EDX 2 #define EBX 3 #define ESP 4 #define EBP 5 #define ESI 6 #define EDI 7 #define STACKPOINTER ESP /*%sp = $esp*/ #define RETURNREG EAX /* Here reside integer fn results */ #define RESULTREG EAX /* alias for above */ #define FRETURNREG 8 /*$f0*/ /* Here reside FP fn results */ #define FRESULTREG 8 /*$f0*/ /* alias for above */ #define FRAMEPOINTER EBP #define f0REG 8 /*$f0*/ #define GOTREG EBX /*$gp = $EBX*/ /***/ /** SPECIAL registers on Pentium */ /***/ #define FLAGREG 0 /* Quotient register or multiply lower 32 bits */ #define FSTP 1 /* The floating stackt pointer */ #define FPSCR 2 /* Floating Status and control reg */ #define FCCBIT 3 /* FP true false(is in fpscr but lower latency */ /* when set by compare than set by MTC) */ #define FOPR 4 /* Fixup order psuedo register - used to */ /* force ordering of Hi16 and Low16 fixups */ #define Maxcreg 4 /* Highest currently used */ /***/ #define REGCEILING 15 /* highest numbered register */ /*%IF modulename="code" %OR modulename="targetprocs" %OR modulename="rprocs" %START*/ static char * regtext [REGCEILING+1] = {"%eax","%ecx", "%edx","%ebx", "%esp","%ebp","%esi","%edi", "FR8","FR9","FRA","FRB", "FRC","FRD","FRE","FRF" }; static char * wregtext [REGCEILING+1] = {"%ax","%cx", "%dx","%bx", "%sp","%bp","%si","%di", "FR8","FR9","FRA","FRB", "FRC","FRD","FRE","FRF" }; static char * bregtext [7+1] = {"%al","%cl","%dl", "%bl", "%ah","%ch","%dh","%bh" }; /***/ static char * Qregtext [Maxcreg+1] = {"FLGS","FSTP", "FSCR","FPCC", "FOPR"}; /*%FINISH */ /***/ #define HASWINDOWREGS 0 /*MIPS doesn't have a windowed register scheme*/ /***/ #define AreaBaseOffset 0 /***/ /***/ #define REGPARAMNUM 0 /* No params in registers*/ #define Regparamsize 4 /* Avoid an arrayinsideout */ #define PARAMBASE 8 /* Params start at EBP+8 */ /***/ #define FRBASE 8 /* base of floating registers */ #define FRSTEP 1 /* step when allocatind fregs */ #define FDRSTEP 2 /* step for when allocating pairs */ /***/ /**/ /* Tregs gives the registers available to the code generator as temporary */ /* registers in the absence of any register variables. Register variables are*/ /* claimed by th Front End via a mask. This is more flexible than assuming an*/ /* order eg when one varaible is used in two successive loops */ /**/ /**/ static const unsigned char Tregs [5+1] = {EAX,ECX, EDX,EBX,ESI,EDI}; /***/ #define LOWVOLREG 0 /* The lowest actual volatile register */ #define HIGHVOLREG 2 /* The highest actual volatile register */ /***/ #define LOWTREG 0 #define HIGHVOLTREG 2 /* highest volatile reg as Treg Index*/ #define HIGHTREG 5 /***/ #define FIRSTFREG 8 /*%f0 */ /* Lowest actual freg */ #define LASTFREG 15 /*%f15*/ /* Highest actual freg */ /***/ #define FIRSTTFREG 0 /* First usable freg as index into Tfregs */ #define LASTTFREG 0 /* Last usable freg as index into Tfregs */ /***/ #define LOWVOLFREG 8 /*%f0 */ #define HIGHVOLFREG 15 /*%f7*/ #define CALLEESAVEDREGS (0xC8) #define CALLEESAVEDFREGS 0 /***/ /**/ /* constants describinf manipulations of the Floating register stack */ /**/ #define NEWPOSN 1 /* Reg is repositioned by EXCH*/ #define INTERCH 2 /* Two reg record to be swopped*/ #define FASTTOTOP 3 /* Nominated reg direct to top */ #define BUBBLETOTOP 4 /* Nominated reg to top without*/ /* disturbing the order of others*/ #define FDISCARD 5 /* Get rid of register & unlock */ /***/ /***/ /***/ /************************** end of mipsdefs.inc ***********************************/ /* end of automatic translation */