; NS32000 assembler predefinition file

; CPU registers for LPR/SPR
; (also used for identification of FP/SP/SB as base registers)
# 1
16_000 upsr
16_400 fp
16_480 sp
16_500 sb
16_680 psr
16_700 intbase
16_780 mod

; MMU registers for LMR/SMR
# 2
16_00000 bpr0
16_08000 bpr1
16_20000 pf0
16_28000 pf1
16_40000 sc
16_50000 msr
16_58000 bcnt
16_60000 ptb0
16_68000 ptb1
16_78000 eia

; String options
# 3
16_10000 b
16_20000 w
16_60000 u
16_70000 bu
16_70000 ub
16_30000 bw
16_30000 wb

; Configuration options for SETCFG
# 4
16_008000 i
16_010000 f
16_020000 m
16_040000 c
16_080000 ff
16_100000 fm
16_200000 fc
16_400000 p

; Length codes (for index modes, also for DC/DS suffixes)
#5
1 b
2 w
4 d
8 q
4 f
8 l

; Register list for ENTER/SAVE
# 6
16_1 r0
16_2 r1
16_4 r2
16_8 r3
16_10 r4
16_20 r5
16_40 r6
16_80 r7

; Register list for EXIT/RESTORE
# 7
16_80 r0
16_40 r1
16_20 r2
16_10 r3
16_8 r4
16_4 r5
16_2 r6
16_1 r7

; Instructions
# 8

; NB all instructions are 2 bytes long (plus parameters), except
; those ending in 2_010 and 2_110, which are 1 and 3 bytes long.

; Parameterless

0 16_0052 reti
0 16_00a2 nop
0 16_00b2 wait
0 16_00c2 dia
0 16_00d2 flag
0 16_00e2 svc
0 16_00f2 bpt

; Relative DISP

1 16_0002 bsr
1 16_000a beq
1 16_001a bne
1 16_002a bcs
1 16_003a bcc
1 16_004a bhi
1 16_005a bls
1 16_006a bgt
1 16_007a ble
1 16_008a bfs
1 16_009a bfc
1 16_00aa blo
1 16_00ba bhs
1 16_00ca blt
1 16_00da bge
1 16_00ea br

; Optional absolute DISP

2 16_0012 ret
2 16_0022 cxp  ; special: takes EXT(n)+0 operand
2 16_0032 rxp
2 16_0042 rett

; Register list

3 16_0062 save

; Register list (reversed)

4 16_0072 restore
4 16_0092 exit

; Register list, absolute DISP

5 16_0082 enter

; Quick, general

6 16_000c addq:
6 16_001c cmpq:
6 16_005c movq:

; CPU register, general

7 16_006c lpr:
7 16_002c spr:

; Quick, general, relative DISP

8 16_004c acb:

; General

9 16_003c seq:
9 16_00bc sne:
9 16_013c scs:
9 16_01bc scc:
9 16_023c shi:
9 16_02bc sls:
9 16_033c sgt:
9 16_03bc sle:
9 16_043c sfs:
9 16_04bc sfc:
9 16_053c slo:
9 16_05bc shs:
9 16_063c slt:
9 16_06bc sge:

9 16_007f cxpd
9 16_017c bicpsrb
9 16_017d bicpsrw
9 16_027f jump
9 16_031e rdval
9 16_037c bispsrb
9 16_037d bispsrw
9 16_057c adjsp:
9 16_067f jsr
9 16_071e wrval
9 16_077c case:
9 16_0f3e lfsr
9 16_373e sfsr  ; special: 2nd operand

; General, general

10 16_0000 add:
10 16_0004 cmp:
10 16_0008 bic:
10 16_0010 addc:
10 16_0014 mov:
10 16_0018 or:
10 16_0020 sub:
10 16_0027 addr
10 16_0027 lxpd
10 16_0028 and:
10 16_0030 subc:
10 16_0034 tbit:
10 16_0038 xor:

10 16_003e movbl
10 16_00be addl
10 16_013e movwl
10 16_01be addf
10 16_033e movdl
10 16_004e rot:
10 16_043e movbf
10 16_04be movl
10 16_053e movwf
10 16_05be movf
10 16_073e movdf
10 16_044e ash:
10 16_046e ffs:
10 16_08be cmpl
10 16_09be cmpf
10 16_084e cbit:
10 16_0c4e cbiti:
10 16_0cae movsu:
10 16_163e movlf
10 16_10be subl
10 16_11be subf
10 16_10ce movxbw
10 16_14be negl
10 16_15be negf
10 16_14ce movzbw
10 16_144e lsh:
10 16_1b3e movfl
10 16_18ce movzbd
10 16_19ce movzwd
10 16_184e sbit:
10 16_1cce movxbd
10 16_1dce movxwd
10 16_1c4e sbiti:
10 16_1cae movus:
10 16_20be divl
10 16_21be divf
10 16_204e neg:
10 16_20ce mul:
10 16_243e roundf:
10 16_203e roundl:
10 16_244e not:
10 16_24ce mei:
10 16_2c3e truncf:
10 16_283e truncl:
10 16_2c4e subp:
10 16_2cce dei:
10 16_30be mull
10 16_31be mulf
10 16_304e abs:
10 16_30ce quo:
10 16_34be absl
10 16_35be absf
10 16_344e com:
10 16_34ce rem:
10 16_384e ibit:
10 16_38ce mod:
10 16_3c3e floorf:
10 16_383e floorl:
10 16_3c4e addp:
10 16_3cce div:

; String option

11 16_000e movs:
11 16_040e cmps:
11 16_0c0e skps:
11 16_800e movst
11 16_840e cmpst
11 16_8c0e skpst

; SETCFG option list

12 16_0b0e setcfg

; General, general, absolute DISP (1..16)

13 16_00ce movm:
13 16_04ce cmpm:

; General, general, abs DISP, abs DISP
; For short form bit field instructions: Base, Dest, offset, Width

14 16_08ce inss:
14 16_0cce exts:

; Register, general, general, absolute disp
; For array form bit field instructions: Offset, Base, Dest, Width

15 16_002e ext:
15 16_00ae ins:

; Register, general, general

16 16_036e cvtp    ; Offset, Base, Dest
16 16_00ee check:  ; Dest, Bounds, Index
16 16_042e index:  ; Dest, UB-LB, Index

; MMU register, general

17 16_0b1e lmr
17 16_0f1e smr

; Directives

18 0 end     ; parameterless
18 1 org     ; absolute disp
18 2 equ     ; general operand
18 3 ds      ; constant
18 4 dc      ; constant list
18 5 data    ; parameterless
18 6 code    ; parameterless
18 7 import  ; label, optional string
18 8 export  ; label, optional string

; Predefined operands
# 9
 0 r0
 1 r1
 2 r2
 3 r3
 4 r4
 5 r5
 6 r6
 7 r7
 0 f0
 1 f1
 2 f2
 3 f3
 4 f4
 5 f5
 6 f6
 7 f7
22 ext
23 tos

# 0