
chip cap(a)->y
      pins(1,2)
      on "dil2"
   c(a)->y
end

chip respak(a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13,a14,a15,b)
   pins(1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16)
   on dil16
   r(b)->a1
   r(b)->a2
   r(b)->a3
   r(b)->a4
   r(b)->a5
   r(b)->a6
   r(b)->a7
   r(b)->a8
   r(b)->a9
   r(b)->a10
   r(b)->a11
   r(b)->a12
   r(b)->a13
   r(b)->a14
   r(b)->a15
end

chip res(a)->b
   pins(1,2)
   on dil2
   r(a)->b
end

chip blank(i<1:8>)->o<1:8>
  pins(1,2,3,4,5,6,7,8,16,15,14,13,12,11,10,9)
  on dil16
  switches(i<1:8>)->o<1:8>
end

chip 25ls2521(a<7:0>,b<7:0>,e\,.vcc,.gnd)->eq\
  pins(2,4,6,8,11,13,15,17, 3,5,7,9,12,14,16,18, 1,20,10,19)
  on dil20
  comparator(a<7:0>,b<7:0>,e\)->eq\
end

chip 26s12(bus\<3:0>,in<3:0>,e\1,e\2,.vcc,.gnd)->bus\<3:0>,out<3:0>
  pins(15,12,4,1,14,11,5,2,9,7, 16,8, 15,12,4,1,13,10,6,3)
  on dil16
  spec xcvr(a,b,c,d,?,?,?,?,?,?)->a,b,c,d,?,?,?,?
  xcvr(bus\<3:0>,in<3:0>,e\1,e\2)->bus\<3:0>,out<3:0>
end

chip 74ls00(a1,b1,a2,b2,a3,b3,a4,b4,.vcc,.gnd)->y1,y2,y3,y4
      pins(1,2,4,5,9,10,12,13,14,7,3,6,8,11)
      on "dil14"
   nand(a1,b1)->y1
   nand(a2,b2)->y2
   nand(a3,b3)->y3
   nand(a4,b4)->y4
end

chip 8881(a1,b1,a2,b2,a3,b3,a4,b4,.vcc,.gnd)->y1,y2,y3,y4
      pins(2,3,5,6,8,9,11,12,14,7,1,4,10,13)
      on "dil14"
   nando(a1,b1)->y1
   nando(a2,b2)->y2
   nando(a3,b3)->y3
   nando(a4,b4)->y4
end

chip 74ls02(a1,b1,a2,b2,a3,b3,a4,b4,.vcc,.gnd)->y1,y2,y3,y4
      pins(2,3,5,6,8,9,11,12,14,7,1,4,10,13)
      on "dil14"
   nor(a1,b1)->y1
   nor(a2,b2)->y2
   nor(a3,b3)->y3
   nor(a4,b4)->y4
end

chip 74ls04(a1,a2,a3,a4,a5,a6,.vcc,.gnd)->y1,y2,y3,y4,y5,y6
      pins(1,3,5,9,11,13,14,7,2,4,6,8,10,12)
      on "dil14"
   inv(a1)->y1
   inv(a2)->y2
   inv(a3)->y3
   inv(a4)->y4
   inv(a5)->y5
   inv(a6)->y6
end

chip 74ls08(a1,b1,a2,b2,a3,b3,a4,b4,.vcc,.gnd)->y1,y2,y3,y4
      pins(1,2,4,5,9,10,12,13,14,7,3,6,8,11)
      on "dil14"
   and(a1,b1)->y1
   and(a2,b2)->y2
   and(a3,b3)->y3
   and(a4,b4)->y4
end

chip 74ls10(a1,b1,c1,a2,b2,c2,a3,b3,c3,.vcc,.gnd)->y1,y2,y3
      pins(1,2,13,3,4,5,9,10,11,14,7,12,6,8)
      on "dil14"
   nand(a1,b1,c1)->y1
   nand(a2,b2,c2)->y2
   nand(a3,b3,c3)->y3
end

chip 74ls11(a1,b1,c1,a2,b2,c2,a3,b3,c3,.vcc,.gnd)->y1,y2,y3
      pins(1,2,13,3,4,5,9,10,11,14,7,12,6,8)
      on "dil14"
   and(a1,b1,c1)->y1
   and(a2,b2,c2)->y2
   and(a3,b3,c3)->y3
end

chip 74ls12(a1,b1,c1,a2,b2,c2,a3,b3,c3,.vcc,.gnd)->y1,y2,y3
      pins(1,2,13,3,4,5,9,10,11,14,7,12,6,8)
      on "dil14"
   nando(a1,b1,c1)->y1
   nando(a2,b2,c2)->y2
   nando(a3,b3,c3)->y3
end

chip 74ls13(a1,b1,c1,d1,a2,b2,c2,d2,.vcc,.gnd)->y1,y2
      pins(1,2,4,5,9,10,12,13,14,7,6,8)
      on "dil14"
   nands(a1,b1,c1,d1)->y1
   nands(a2,b2,c2,d2)->y2
end

chip 74ls14(a1,a2,a3,a4,a5,a6,.vcc,.gnd)->y1,y2,y3,y4,y5,y6
      pins(1,3,5,9,11,13,14,7,2,4,6,8,10,12)
      on "dil14"
   invs(a1)->y1
   invs(a2)->y2
   invs(a3)->y3
   invs(a4)->y4
   invs(a5)->y5
   invs(a6)->y6
end

chip 74ls15(a1,b1,c1,a2,b2,c2,a3,b3,c3,.vcc,.gnd)->y1,y2,y3
      pins(1,2,13,3,4,5,9,10,11,14,7,12,6,8)
      on "dil14"
   ando(a1,b1,c1)->y1
   ando(a2,b2,c2)->y2
   ando(a3,b3,c3)->y3
end

chip 74ls16(a1,a2,a3,a4,a5,a6,.vcc,.gnd)->y1,y2,y3,y4,y5,y6
      pins(1,3,5,9,11,13,14,7,2,4,6,8,10,12)
      on "dil14"
   invo(a1)->y1
   invo(a2)->y2
   invo(a3)->y3
   invo(a4)->y4
   invo(a5)->y5
   invo(a6)->y6
end

chip 74ls17(a1,a2,a3,a4,a5,a6,.vcc,.gnd)->y1,y2,y3,y4,y5,y6
      pins(1,3,5,9,11,13,14,7,2,4,6,8,10,12)
      on "dil14"
   bufo(a1)->y1
   bufo(a2)->y2
   bufo(a3)->y3
   bufo(a4)->y4
   bufo(a5)->y5
   bufo(a6)->y6
end

chip 74ls20(a1,b1,c1,d1,a2,b2,c2,d2,.vcc,.gnd)->y1,y2
      pins(1,2,4,5,9,10,12,13,14,7,6,8)
      on "dil14"
   nand(a1,b1,c1,d1)->y1
   nand(a2,b2,c2,d2)->y2
end

chip 74ls21(a1,b1,c1,d1,a2,b2,c2,d2,.vcc,.gnd)->y1,y2
      pins(1,2,4,5,9,10,12,13,14,7,6,8)
      on "dil14"
   and(a1,b1,c1,d1)->y1
   and(a2,b2,c2,d2)->y2
end

chip 74ls22(a1,b1,c1,d1,a2,b2,c2,d2,.vcc,.gnd)->y1,y2
      pins(1,2,4,5,9,10,12,13,14,7,6,8)
      on "dil14"
   nando(a1,b1,c1,d1)->y1
   nando(a2,b2,c2,d2)->y2
end

chip 74ls38(a1,b1,a2,b2,a3,b3,a4,b4,.vcc,.gnd)->y1,y2,y3,y4
      pins(1,2,4,5,9,10,12,13,14,7,3,6,8,11)
      on "dil14"
   nando(a1,b1)->y1
   nando(a2,b2)->y2
   nando(a3,b3)->y3
   nando(a4,b4)->y4
end

chip 74ls27(a1,b1,c1,a2,b2,c2,a3,b3,c3,.vcc,.gnd)->y1,y2,y3
      pins(1,2,13,3,4,5,9,10,11,14,7,12,6,8)
      on "dil14"
   nor(a1,b1,c1)->y1
   nor(a2,b2,c2)->y2
   nor(a3,b3,c3)->y3
end

chip 74ls28(a1,b1,a2,b2,a3,b3,a4,b4,.vcc,.gnd)->y1,y2,y3,y4
      pins(1,2,4,5,9,10,12,13,14,7,3,6,8,11)
      on "dil14"
   nor(a1,b1)->y1
   nor(a2,b2)->y2
   nor(a3,b3)->y3
   nor(a4,b4)->y4
end

chip 74ls30(a,b,c,d,e,f,g,h,.vcc,.gnd)->y
      pins(1,2,3,4,5,6,11,12,14,7,8)
      on "dil14"
   nand(a,b,c,d,e,f,g,h)->y
end

chip 74ls32(a1,b1,a2,b2,a3,b3,a4,b4,.vcc,.gnd)->y1,y2,y3,y4
      pins(1,2,4,5,9,10,12,13,14,7,3,6,8,11)
      on "dil14"
   or(a1,b1)->y1
   or(a2,b2)->y2
   or(a3,b3)->y3
   or(a4,b4)->y4
end

chip 74ls33(a1,b1,a2,b2,a3,b3,a4,b4,.vcc,.gnd)->y1,y2,y3,y4
      pins(2,3,5,6,8,9,11,12,14,7,1,4,10,13)
      on "dil14"
   noro(a1,b1)->y1
   noro(a2,b2)->y2
   noro(a3,b3)->y3
   noro(a4,b4)->y4
end

chip 74ls74(d1,set\1,clr\1,ck1,d2,set\2,clr\2,ck2,.vcc,.gnd)->q1,q\1,q2,q\2
      pins(2,4,1,3,12,10,13,11,14,7,5,6,9,8)
      on "dil14"
   u74(d1,set\1,clr\1,ck1)->q1,q\1
   u74(d2,set\2,clr\2,ck2)->q2,q\2
end

chip 74ls86(a1,b1,a2,b2,a3,b3,a4,b4,.vcc,.gnd)->y1,y2,y3,y4
      pins(1,2,4,5,9,10,12,13,14,7,3,6,8,11)
      on "dil14"
   xor(a1,b1)->y1
   xor(a2,b2)->y2
   xor(a3,b3)->y3
   xor(a4,b4)->y4
end

chip 74ls138(c,b,a,e\1,e\2,e3,.vcc,.gnd)->y\<7:0>
  pins(3,2,1,4,5,6,16,8, 7,9,10,11,12,13,14,15)
  on dil16
  u138(c,b,a,e\1,e\2,e3)->y\<7:0>
end

chip 74ls175(d1,d2,d3,d4,clr\,ck,.vcc,.gnd)->q1,q1b,q2,q2b,q3,q3b,q4,q4b
      pins(4,5,12,13,1,9,16,8,2,3,7,6,10,11,15,14)
      on "dil16"
   u74175(d1,d2,d3,d4,clr\,ck)->q1,q2,q3,q4,q1b,q2b,q3b,q4b
end
chip 74ls123(set\1,set1,clr\1,rc1,c1, set\2,set2,clr\2,rc2,c2, .vcc,.gnd)
        ->(q1,q\1,q2,q\2)
     pins (1,2,3,15,14, 9,10,11,7,6, 16,8, 13,4, 5,12)
     on dil16
     u123(set\1,set1,clr\1,rc1,c1)->q1,q\1
     u123(set\2,set2,clr\2,rc2,c2)->q2,q\2
end

chip 74ls125(i1,e\1,i2,e\2,i3,e\3,i4,e\4,.vcc,.gnd)->o1,o2,o3,o4
      pins(1,2,4,5,8,9,11,12, 14,7, 3,6,10,13)
      on "dil14"
   u125(i1,e\1)->o1
   u125(i2,e\2)->o2
   u125(i3,e\3)->o3
   u125(i4,e\4)->o4
end

chip 74ls191(i<3:0>,up\dn,en\,ld\,ck,.vcc,.gnd)->o<3:0>,maxmin,rip\
  pins(15,1,10,9, 5,4,11,14, 16,8, 3,2,6,7, 12,13)
  on dil16
  u191(i<3:0>,up\dn,en\,ld\,ck)->o<3:0>,maxmin,rip\
end

chip 74ls244(i<7:0>,e\<4,0>,.vcc,.gnd)->o<7:0>
  pins(2,4,6,8,11,13,15,17, 1,19,20,10, 18,16,14,12,9,7,5,3)
  on dil20
  u244(i<7:0>,e\<4,0>)->o<7:0>
end

chip 74ls374(i<7:0>,ck,en\,.vcc,.gnd) -> o<7:0>
  pins(3,4,7,8,13,14,17,18, 11,1,20,10, 2,5,6,9,12,15,16,19)
  on dil20
  u374(i<7:0>,ck,en\)->o<7:0>
end

$chip dcdcchip(vcc,gnd)->plus,minus
$  pins(1,2,3,4)
$  on dcdcbox
$  dcdcconv(vcc,gnd)->plus,minus
$end
$
$chip 7812(in,gnd)->out
$  on to45 pins(1,2,3)
$  regp12(in,gnd)->out
$end
$
$chip 7905(in,gnd)->out
$  on to45 pins(2,1,3)
$  regm5(in,gnd)->out
$end
$
$chip 7912(in,gnd)->out
$  on to45 pins(2,1,3)
$  regm12(in,gnd)->out
$end

finish
