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$J1 $Times12
$T=0.25",0.5",0.75",1",1.25",1.5",1.75",2",2.5",3",3.5",4",4.5",5",5.3"
$pageno=22

$pages
$chapter'Microcode assembler and microcode loader'
$section'Assembler'
$p0.5
There exists a simple microcode assembler, which allows to exercise detailed
control over the data path.
$p0.5
Comments are bracketed with a percent sign "$list12[%]" and a leading 
$list12[0] identifies hexadecimal representation of numbers.
$b0.5
The assembler requires:
$b0.5
$h[Declaration of microword format]
$b0
The declaration is a list of microword field names, their associated widths
and default values. The declaration of the microword of the graphics
processor is given below and it can be also picked up from C:IBH:FORMDEF.
$b0.5
$list8 $l0
    form const    (16)=   0,    % constant field %
         lAs       (1)=   0,    % left  A bus source select %
         lBs       (2)=   0,    % left  B bus source select %
         rAs       (1)=   1,    % right A bus source select %
         rBs       (1)=   1,    % right B bus source select %
         ldatas    (2)=   0,    % left  data bus source select %
         rdatas    (2)=   0,    % right data bus source select %
         rdatad    (2)=   1,    % right data bus destination select %
         spsALU    (5)=   1,    % AM29203 instruction bits <4:0> %
         spsdes    (3)=   4,    % AM29203 instruction bits <7:5> %
         shiftrl   (1)=   1,    % AM29203 instr bit <8> and AM2904 bit <10> %
         rfaA      (4)=   0,    % AM29203 port A register address %
         rfaB      (5)=   0,    % AM29203 port B and frame control registers %
         AM04ia    (6)= 034,    % AM2904 instruction bits <5:0> %
         condsel   (2)=   3,    % condition input to AM2903 multiplexer %
         shiftlk   (4)=   0,    % AM2904 instruction bits <9:6> %
         AM04ib    (2)=   0,    % AM2904 instruction bits <12:11> %
         AM04cemL  (1)=   1,    % AM2904 machine status register enable %
         AM04ceuL  (1)=   1,    % AM2094 micro status register enable %
         dmai      (3)=   7,    % AM2942 dma counter instruction bits <2:0> %
         dmasel    (1)=   0,    % A/B segment instruction select bit %
         dmaBcenL  (1)=   1,    % B segment or long AB dma count enable %
         dmaAcenL  (1)=   1,    % A segment dma count enable %
         dmamode   (1)=   1,    % one long/two short counters select %
         seqi      (4)=  14,    % AM2910 sequencer instruction bits <3:0> %
         srldL     (1)=   1,    % AM2910 register load %
         waitreq   (1)=   0,    % microcode wait bit %
         slowck    (1)=   1     % microcode clock speed %
$b2
$times12
$h[Definitions of microoperations]
$b0.5
A useful starting set of microoperation definitions can be picked up from
C:IBH:HARDDEF, listed below.
$b0.5
$list8 $l0
% address busses control %
def lAreg(a)   = lAs=0;rfaA=a
def lBreg(b)   = lBs=0;rfaB=b
def lBconst(c) = lBs=2;const=c
def lABreg(a,b)= lAs=0;lBs=0;rfaA=a;rfaB=b
def lAdma      = lAs=1;rAs=0
def lBdma      = lBs=1;rBs=0
def lABdma     = lAs=1;lBs=1;rAs=0;rBs=0
def rAdma      = rAs=0
def rBdma      = rBs=0
def rABdma     = rAs=0;rBs=0
def rAreg(a)   = rAs=1;lAs=0;rfaA=a
def rBreg(b)   = rBs=1;lBs=0;rfaB=b
def rBconst(c) = rBs=1;lBs=2;const=c
def rABreg(a,b)= rAs=1;rBs=1;lAs=0;lBs=0;rfaA=a;rfaB=b

% data busses control %
def lDalu      = ldatas=0
def lDdata     = ldatas=1
def lDswop     = ldatas=2
def lDzcno     = ldatas=3
let memory=0, lD=1, APM=2, frame=3
def read(s)    = rdatas=s
def write(d)   = rdatad=d

% processor control %
  % ALU functions %
  def aluspecial      = spsALU=0
  def aluhigh         = spsALU=1
  def lBplsNlAplsC    = spsALU=2
  def QplsNlAplsC     = spsALU=3
  def lAplsNlBplsC    = spsALU=4
  def lAplsNQplsC     = spsALU=5
  def lAplslBplsC     = spsALU=6
  def lAplsQplsC      = spsALU=7
  def lBplsC          = spsALU=8
  def QplsC           = spsALU=9
  def NlBplsC         = spsALU=10
  def NQplsC          = spsALU=11
  def lAplsC          = spsALU=13
  def NlAplsC         = spsALU=15
  def alulow          = spsALU=17
  def NlAandlB        = spsALU=18
  def NlAandQ         = spsALU=19
  def lAxnorlB        = spsALU=20
  def lAxnorQ         = spsALU=21
  def lAxorlB         = spsALU=22
  def lAxorQ          = spsALU=23
  def lAandlB         = spsALU=24
  def lAandQ          = spsALU=25
  def lAnorlB         = spsALU=26
  def lAnorQ          = spsALU=27
  def lAnandlB        = spsALU=28
  def lAnandQ         = spsALU=29
  def lAorlB          = spsALU=30
  def lAorQ           = spsALU=31
  % Special functions %
  def TCmult     = aluspecial;spsdes=2;shiftrl=0;shiftlk=15
  def TCmultlast = aluspecial;spsdes=6;shiftrl=0;shiftlk=15
  def TCdivfirst = aluspecial;spsdes=2;shiftrl=1;shiftlk=15
  def TCdiv      = aluspecial;spsdes=4;shiftrl=1;shiftlk=15
  def TCdivlast  = aluspecial;spsdes=6;shiftrl=1;shiftlk=3
  % ALU destination control %
  def lsrFtoYwr       = shiftrl=0;spsdes=1
  def lsr0FQtoYwr     = shiftrl=0;shiftlk=6;spsdes=3
  def asrFQtoYwr      = shiftrl=0;shiftlk=6;spsdes=2
  def lsrNFQtoYwr     = shiftrl=0;shiftlk=14;spsdes=3
  def FtoQY           = shiftrl=0;spsdes=6
  def lslFtoYwr       = shiftrl=1;spsdes=1
  def aslFtoYwr       = shiftrl=1;spsdes=0
  def aslFQtoYwr      = shiftrl=1;spsdes=2;shiftlk=6
  def lslFQ0toYwr     = shiftrl=1;shiftlk=6;spsdes=3
  def FtoY            = shiftrl=1;spsdes=4
  def FtoYwr          = shiftrl=1;spsdes=7
  % shift control %
  def shleft          = shiftrl=1
  def shright         = shiftrl=0
  % register addresses %
  def regA(r)         = rfaA=r
  def regB(r)         = rfaB=r

% control for AM2904 %
  % carry - in control %
  def Cin0            = AM04ib=0
  def Cin1            = AM04ib=1
  def CinZ            = AM04ib=2

% composite functions %
def bswopR1toR2(r1,r2) = lAreg(r1);lDswop;FtoYwr;regB(r2)
def CtoY(c)         = lBconst(c);lBplsC;Cin0;FtoY;lDalu
def CtoR(c,r)       = lBconst(c);lBplsC;Cin0;FtoYwr;lDalu;regB(r)
def CtoCR(c,r)      = CtoR(c,r);read(lD)
def R1toR2(r1,r2)   = lAreg(r1);lAplsC;Cin0;FtoYwr;lDalu;regB(r2)
def R1plsQtoR2(r1,r2)=lABreg(r1,r2);lAplsQplsC;Cin0;FtoYwr;lDalu
def R1plsCtoR2(a,c,b)=lAreg(a);lBconst(c);lAplslBplsC;Cin0;FtoYwr;lDalu;regB(b)
def R1minCtoR2(a,c,b)=lAreg(a);lBconst(c);lAplsNlBplsC;Cin1;FtoYwr;
                              lDalu;regB(b)
def RcompareC(r,c) = lAreg(r);lBconst(c);lAplsNlBplsC;Cin1;FtoY
def R1compareR2(r1,r2)=lABreg(r2,r1);lBplsNlAplsC;Cin1;FtoY
def R1minR2toR1(r1,r2)=lAreg(r2);lBreg(r1);lBplsNlAplsC;Cin1;FtoYwr;lDalu
def R1minR2toQ(r1,r2)=lABreg(r2,r1);lBplsNlAplsC;Cin1;FtoQY
def minR(r)         = lBreg(r);NlBplsC;Cin1;FtoYwr;lDalu
def R1plsR2toR1(r1,r2)=lAreg(r2);lBreg(r1);lAplslBplsC;Cin0;FtoYwr;lDalu
def incR1toR2(r1,r2)  =lAreg(r1);lAplsC;Cin1;FtoYwr;lDalu;regB(r2)
def R1andCtoR2(a,c,b)=lAreg(a);lBconst(c);lAandlB;FtoYwr;lDalu;regB(b)
def R1orCtoR2(a,c,b) =lAreg(a);lBconst(c);lAorlB;FtoYwr;lDalu;regB(b)
def CtoQ(c) = lBconst(c);lBplsC;Cin0;FtoQY
def RtoQY(r) = lAreg(r);lAplsC;Cin0;FtoQY
def RtoY(r) = lAreg(r);lAplsC;Cin0;FtoY
def RtolD(r) = RtoY(r);lDalu
def R1ashltoR2(r1,r2)=lAreg(r1);regB(r2);lAplsC;Cin0;aslFtoYwr;lDalu
def mematCtoR(c,r) = rBconst(c);read(memory);lDdata;regB(r);FtoYwr
def mematRtoR(r)   = rBreg(r);read(memory);lDdata;FtoYwr
def RtomematC(r,c) = rBconst(c);write(memory);RtoY(r);lDalu;read(lD)
def R1tomematR2(r1,r2)=rBreg(r2);write(memory);RtoY(r1);lDalu;read(lD)
def APMtoR(r)      = read(APM);lDdata;FtoYwr;regB(r)
def APMofR1R2toR2(r1,r2)=lABreg(r1,r2);APMtoR(r2)
def QtoAPM(MS,LS)  = lABreg(MS,LS);QplsC;Cin0;FtoY;lDalu;read(lD);write(APM)
def Qtoframe       = QplsC;Cin0;FtoY;lDalu;read(lD);write(frame)
def QtomematC(c)   = rBconst(c);QplsC;Cin0;lDalu;read(lD);write(memory)
def QtoR(r)        = QplsC;Cin0;FtoYwr;lDalu;regB(r)

% condition selection %
def IFTRUE  = condsel=3;AM04ia=53
def IFFALSE = condsel=3;AM04ia=52
def IFlD5   = condsel=3;AM04ia=54
def IFNlD5  = condsel=3;AM04ia=55
def IFlD1   = condsel=3;AM04ia=58
def IFNlD1  = condsel=3;AM04ia=59
def IFblankY  = condsel=3;AM04ia=62
def IFNblankY = condsel=3;AM04ia=63
def IFlD0   = condsel=2;AM04ia=52
def IFNlD0  = condsel=2;AM04ia=53
def IFlD6   = condsel=2;AM04ia=54
def IFNlD6  = condsel=2;AM04ia=55
def IFlD2   = condsel=2;AM04ia=58
def IFNlD2  = condsel=2;AM04ia=59
def IFlD3   = condsel=2;AM04ia=62
def IFNlD3  = condsel=2;AM04ia=63
def IFdoneA = condsel=1;AM04ia=52
def IFNdoneA= condsel=1;AM04ia=53
def IFlD7   = condsel=1;AM04ia=54
def IFNlD7  = condsel=1;AM04ia=55
def IFdoneB = condsel=1;AM04ia=58
def IFNdoneB= condsel=1;AM04ia=59
def IFlD4   = condsel=1;AM04ia=62
def IFNlD4  = condsel=1;AM04ia=63
def IFiZ    = condsel=0;AM04ia=52
def IFNiZ   = condsel=0;AM04ia=53
def IFiOVR  = condsel=0;AM04ia=54
def IFNiOVR = condsel=0;AM04ia=55
def IFiC    = condsel=0;AM04ia=58
def IFNiC   = condsel=0;AM04ia=59
def IFiN    = condsel=0;AM04ia=62
def IFNiN   = condsel=0;AM04ia=63

% sequencer control %
def JZ      = seqi=0             %unconditional jump to 0%
def CJS(t)  = seqi=1;const=t %conditional call at constant%
def JMAP    = seqi=2             %unconditional jump to Data%
def CJP(t)  = seqi=3;const=t %conditional jump to constant%
def PUSH(l) = seqi=4;const=l %psh & cond.load const.to cntr%
def JSRP(t) = seqi=5;const=t %call(condition): reg or const%
def CJV     = seqi=6             %conditional jump to Data%
def JRP(t)  = seqi=7;const=t %branch(condition): reg or const%
def RFCT    = seqi=8             %reg=0=>(pop&cont.)|jmp stck&r-1%
def RPCT(t) = seqi=9;const=t %reg=0=>continue|(jmp const&r-1)%
def CRTN    = seqi=10            %conditional return%
def CJPP(t) = seqi=11;const=t %conditional jump to const & pop%
def LDCT(c) = seqi=12;const=c %unconditional ld const. to reg.%
def LOOP    = seqi=13            %cond=>(cont.&pop)|jumpto stack%
def CONT    = seqi=14            %continue%
def TWB(t)  = seqi=15;const=t %cond=>(cont&pop)|(0=>t&pop|stk)%
def seqrld  = srldL=0

% composite functions %
def continue   = IFFALSE;seqi=3
def callatC(c) = IFTRUE;CJS(c)
def return     = IFTRUE;CRTN
def jumptoC(c) = IFTRUE;CJP(c)

% timer %
def wait    = waitreq=1

% DMA control %
let dmaAcup = 0
let dmaAcdn = 00404
let dmaWcdn = 0
def Bwrcr   = dmai=0;dmasel=0
def Awrcr   = dmai=0;dmasel=1
def Brdcr   = dmai=1;dmasel=0
def Ardcr   = dmai=1;dmasel=1
def Brdwc   = dmai=2;dmasel=0
def Ardwc   = dmai=2;dmasel=1
def Brdac   = dmai=3;dmasel=0
def Ardac   = dmai=3;dmasel=1
def Brein   = dmai=4;dmasel=0
def Arein   = dmai=4;dmasel=1
def Bldad   = dmai=5;dmasel=0
def Aldad   = dmai=5;dmasel=1
def Bldwc   = dmai=6;dmasel=0
def Aldwc   = dmai=6;dmasel=1
def Benct   = dmai=7;dmasel=0
def Aenct   = dmai=7;dmasel=1
def Bcnt    = dmaBcenL=0;dmamode=1
def Acnt    = dmaAcenL=0;dmamode=1
def longcnt = dmaBcenL=0;dmamode=0;dmai=7
def slowly = slowck=1
def fast = slowck=0
$b2
$Times12
$h[Source microprogram]
$b0.5
The following example sections of microcode contain some constant declarations
and an example graphics function.
$b0.5
$list8 $l0
include formdef  % provide microword format definition %
include harddef  % provide definitions of microoperations %
% execution flags (new microoperations)%
def IFoptimise  = IFlD7
def IFNoptimise = IFNlD7
def IFwait      = IFlD6
def IFNwait     = IFNlD6
def IFNindirect = IFNlD5
def IFNindexA   = IFNlD4
def IFNindexB   = IFNlD3
def IFcursor    = IFlD2
def IFNcursor   = IFNlD2
def IFNdown     = IFNlD1
def IFNright    = IFNlD0
% registers %
  % control registers %
  let aregA   = 23,
      aregB   = 22,
      offsetY = 19,
      offsetX = 18,
      plwren  = 17,
      colour  = 16
  % data path registers %
  let stackpt = 15,       % stack pointer in local memory %
      coorY0  = 14,       % absolute current evaluation coordinate Y %
      coorX0  = 13,       %                                        X %
      coorY1  = 12,       % relative to Y0 %
      coorX1  = 11,       % relative to X0 %
      coorY2  = 10,
      coorX2  =  9,
      addrLS  =  8,       % address register: half-word address %
      addrMS  =  7,
      opcode  =  6,
      argB    =  5,       % argument registers %
      argA    =  4,aux4=4,aux3=3,
      R3=3,R2=2,R1=1,accum=0           %general registers%
% address constants %
  let myaddr = 104      % more significant half of processor bus address %
  % ROM %
  let maskbase    = 0,  bitbase     = 16,
      fontVISUAL  = 384,fontBANTAM  = 1792                     %resident fonts%
  % RAM %
  let RAMbase     = 4096,
      RAMtop      = RAMbase + 4096,
      exepointer  = RAMbase    ,   % current execution pointer %
      status      = RAMbase + 2,   % working status register %
      % environment %
      currink     = RAMbase + 3,   % drawing colour %
      currplan    = RAMbase + 4,   % planes enable mask %
      workX       = RAMbase + 5,   % current working coordinates: X %
      workY       = RAMbase + 6,   %                              Y %
      bblX        = RAMbase + 7,   % current bounding box: left   X %
      bbbY        = RAMbase + 8,   %                       bottom Y %
      bbrX        = RAMbase + 9,   %                       right  X %
      bbtY        = RAMbase +10,   %                       top    Y %
      cblX        = RAMbase +11,   % current clipping box: left   X %
      cbbY        = RAMbase +12,   %                       bottom Y %
      cbrX        = RAMbase +13,   %                       right  X %
      cbtY        = RAMbase +14,   %                       top    Y %
      iscaleX     = RAMbase +15,   % immediate scaling factor:    X %
      iscaleY     = RAMbase +16,   %                              Y %
      dscaleX     = RAMbase +17,   % deferred scaling factor:     X %
      dscaleY     = RAMbase +18,   %                              Y %
      iteration   = RAMbase +19,   % iteration index %
      currfont    = RAMbase +20,   % current font pointer %
      currargarray= RAMbase +22,   % current argument array pointer %
      currcursor  = RAMbase +24,   % current cursor-drawing structure pointer %
      reportloc   = RAMbase +26,   % reporting address %
      % auxiliary locations %
      APMdata     = RAMbase + 32,
      stackmarker = RAMbase + 33,
      rasterbuff  = RAMbase + 1024,
      stackbottom = RAMtop,            % pointer points at the topmost element %
      stacklimit  = stackbottom - 2048

% geometry of the screen %
let screenhight = 512,
    screenwidth = 48*16

begin:     CtoR(stackbottom,stackpt);wait
% ** instruction fetch ** %
evaloop:   mematCtoR(exepointer,addrMS)   % bring execution pointer %
           mematCtoR(exepointer+1,addrLS) % from local memory       %
           callatC($#shraddr)
           R1toR2(addrLS,opcode)          % fetch the instruction   %
           APMofR1R2toR2(addrMS,opcode);callatC($#incaddr)

% ** fetch from exepointer+2 and exepointer+4 into argA and argB ** %
           R1toR2(addrLS,argA)
           APMofR1R2toR2(addrMS,argA);callatC($#incaddr)
           R1toR2(addrLS,argB)
           APMofR1R2toR2(addrMS,argB);callatC($#incaddr)

           .......
           .......
           .......

% *** drawing a box *** %
drawboxC:  R1plsR2toR1(argA,coorX0)   % diagonal of the box %
           R1plsR2toR1(argB,coorY0)
           % sort the edges and expand environmental bounding box %
           R1compareR2(argA,coorX0);IFiN;CJP($#boxswopX)
           RtomematC(argA,bbrX)  % expand bounding box to the right %
           jumptoC($#boxYsort)
boxswopX:  R1toR2(coorX0,accum)  % swop coorX0 and argA for box to the left%
           R1toR2(argA,coorX0);rBconst(bblX);read(lD);write(memory)
           R1toR2(accum,argA)
boxYsort:  R1compareR2(argB,coorY0);IFiN;CJP($#boxswopY)
           RtomematC(argB,bbtY)  % expand bounding box upwards %
           jumptoC($#boxlclip)
boxswopY:  R1toR2(coorY0,accum)  % swop coorY0 and argB for box downwards %
           R1toR2(argB,coorY0);rBconst(bbbY);read(lD);write(memory)
           R1toR2(accum,argB)
           % clip the box while checking for intersection %
boxlclip:  mematCtoR(cblX,accum) % left clipping edge %
           R1compareR2(argA,accum);IFiN;CJP($#endcall)  % outside to the left %
           R1compareR2(coorX0,accum);IFNiN;CJP($#boxrclip)
           R1toR2(accum,coorX0) % clip on the left %
boxrclip:  mematCtoR(cbrX,accum) % right clipping edge %
           R1compareR2(accum,coorX0);IFiN;CJP($#endcall) % outside to the right %
           R1compareR2(accum,argA);IFNiN;CJP($#boxbclip)
           R1minCtoR2(accum,1,argA) % clip on the right %
boxbclip:  mematCtoR(cbbY,accum) % bottom clipping edge %
           R1compareR2(argB,accum);IFiN;CJP($#endcall)   % outside below %
           R1compareR2(coorY0,accum);IFNiN;CJP($#boxtclip)
           R1toR2(accum,coorY0) % clip on bottom %
boxtclip:  mematCtoR(cbtY,accum) % top clipping edge %
           R1compareR2(accum,coorY0);IFiN;CJP($#endcall) % outside above %
           R1compareR2(accum,argB);IFNiN;CJP($#boxdscal)
           R1minCtoR2(accum,1,argB) % clip on top %
boxdscal:  mematCtoR(dscaleX,R1) % deferred scaling in X %
           R1toR2(coorX0,accum);callatC($#scalmult)
           R1toR2(accum,coorX0)
           R1toR2(argA,accum);callatC($#scalmult)
           R1toR2(accum,argA)
           mematCtoR(dscaleY,R1) % deferred scaling in Y %
           R1toR2(coorY0,accum);callatC($#scalmult)
           R1toR2(accum,coorY0)
           R1toR2(argB,accum);callatC($#scalmult)
           R1toR2(accum,argB)
           R1minR2toR1(argA,coorX0);IFiZ;CJP($#endcall) % size of the box in X %
           R1minR2toR1(argB,coorY0);IFiZ;CJP($#endcall) % size of the box in Y %
           rBconst(dmaAcup+dmaWcdn);Bwrcr % set up DMA support for Y %
           rBreg(coorY0);Bldad
           rBreg(argB);Bldwc
           CtoR(16,R1)
           CtoQ(0FFFF)
boxhloop:  R1compareR2(argA,R1);IFiN;CJP($#boxlstrp)
boxvlo16:  lAreg(coorX0);lBdma;Benct;Bcnt;Qtoframe;IFNdoneB;CJP($#boxvlo16)
           R1minR2toR1(argA,R1);IFiZ;CJP($#endcall)
           R1plsR2toR1(coorX0,R1);Brein;jumptoC($#boxhloop)
boxlstrp:  rBreg(argA);read(memory);lDdata;FtoYwr;slowly % fetch write mask %
           RtoQY(argA)
boxvloen:  lAreg(coorX0);lBdma;Benct;Bcnt;Qtoframe;IFNdoneB;CJP($#boxvloen)
           jumptoC($#endcall)  

           ......
           ......
end
$b0.5
$times12
All these have to be included in one source file explicitly or through
"include filename" construct.
$b0.5
Assembler is invoked through command
IBH:MU $i[SourceFilename] and will
produce loadable microcode under $i[SourceFilename.mu] .
$section'Loader'
$p0.5
Loadable microcode can be loaded into microcode RAM through
command 
$b0
IBH:MLOAD $i[SourceFilename]. Extension $i[.mu] is assumed
automatically.
$section'Running and debugging'
reset $t*4[
A reset operation puts the processor into a WAIT state prior to execution
of the first microinstruction (at 000).
]$b0.5
execute $t*4[
A write into location 00D04000 is equivalent to pressing an "EXECUTE" key
on the front panel. After initialisation it should be done once in order
to start the processor. During the exercise this should be preceeded by loading
the dynamic microcode.
]$b0.5
single-step $t*4[Single-stepping through instructions can be obtained
through setting their Wait execution flags and then using the writes into
00D04000 to activate evaluation of consecutive instructions.
$b0
Wait states to single-step through microcode can be achieved by setting
to 1 the $i[wait] bit in the microwords of the required microinstructions.
]$b0.5
$section'Simulator'
To run the simulator just type IBH:SIM. There will be a legend for the
function keys explaining how to exercise it.
$e*
