\begin{table}[htb]
\begin{center}
\begin{tabular}{|c|c||c|c|c|} \hline
  $A$ &  $B$ & $LT$ & $OK$ & $GT$ \\ \hline
  6 &  7 &  1 &  0 & 0 \\
  6 &  8 &  1 &  0 & 0 \\
  7 &  8 &  1 &  0 & 0 \\
  7 &  9 &  1 &  0 & 0 \\
  8 &  9 &  1 &  0 & 0 \\
  8 & 10 &  1 &  0 & 0 \\
  9 & 10 &  1 &  0 & 0 \\
  9 & 11 &  1 &  0 & 0 \\
 10 & 11 &  1 &  0 & 0 \\
 10 & 12 &  0 &  1 & 0 \\
 11 & 12 &  0 &  1 & 0 \\
 11 & 13 &  0 &  1 & 0 \\
 12 & 13 &  0 &  1 & 0 \\
 12 & 14 &  0 &  1 & 0 \\
 13 & 14 &  0 &  1 & 0 \\
 13 & 15 &  0 &  0 & 1 \\
 14 & 15 &  0 &  0 & 1 \\ \hline
\end{tabular}
\end{center}
\caption{Simulation results for the database circuit}
\end{table}
